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Prototype was for vcn_v2_5_enable_clock_gating() instead Message-ID: <202502131948.uPfL1v3A-lkp@intel.com> Precedence: bulk X-Mailing-List: oe-kbuild-all@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline tree: https://gitlab.freedesktop.org/agd5f/linux.git amd-staging-drm-next head: f73e8ad616bce0bb1dfdedee4b871346a739b9c7 commit: 86d5e11eb3cfce62564272a8f0fb1c547cc0f8fe [2306/2320] drm/amdgpu/vcn2.5: split code along instances config: x86_64-buildonly-randconfig-004-20250213 (https://download.01.org/0day-ci/archive/20250213/202502131948.uPfL1v3A-lkp@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250213/202502131948.uPfL1v3A-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202502131948.uPfL1v3A-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c:781: warning: expecting prototype for vcn_v2_5_enable_clock_gating_inst(). Prototype was for vcn_v2_5_enable_clock_gating() instead vim +781 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c d2a2c64f53718a James Zhu 2019-12-18 771 cbead2bdfcf1dd Leo Liu 2019-04-15 772 /** 86d5e11eb3cfce Alex Deucher 2024-11-13 773 * vcn_v2_5_enable_clock_gating_inst - enable VCN clock gating cbead2bdfcf1dd Leo Liu 2019-04-15 774 * cbead2bdfcf1dd Leo Liu 2019-04-15 775 * @adev: amdgpu_device pointer 86d5e11eb3cfce Alex Deucher 2024-11-13 776 * @i: instance to enable clockgating on cbead2bdfcf1dd Leo Liu 2019-04-15 777 * cbead2bdfcf1dd Leo Liu 2019-04-15 778 * Enable clock gating for VCN block cbead2bdfcf1dd Leo Liu 2019-04-15 779 */ 86d5e11eb3cfce Alex Deucher 2024-11-13 780 static void vcn_v2_5_enable_clock_gating(struct amdgpu_device *adev, int i) cbead2bdfcf1dd Leo Liu 2019-04-15 @781 { cbead2bdfcf1dd Leo Liu 2019-04-15 782 uint32_t data = 0; cbead2bdfcf1dd Leo Liu 2019-04-15 783 fba4761ca00f9e Alex Deucher 2024-11-20 784 if (adev->vcn.harvest_config & (1 << i)) 86d5e11eb3cfce Alex Deucher 2024-11-13 785 return; cbead2bdfcf1dd Leo Liu 2019-04-15 786 /* enable UVD CGC */ fba4761ca00f9e Alex Deucher 2024-11-20 787 data = RREG32_SOC15(VCN, i, mmUVD_CGC_CTRL); cbead2bdfcf1dd Leo Liu 2019-04-15 788 if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) cbead2bdfcf1dd Leo Liu 2019-04-15 789 data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; cbead2bdfcf1dd Leo Liu 2019-04-15 790 else cbead2bdfcf1dd Leo Liu 2019-04-15 791 data |= 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; cbead2bdfcf1dd Leo Liu 2019-04-15 792 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT; cbead2bdfcf1dd Leo Liu 2019-04-15 793 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; fba4761ca00f9e Alex Deucher 2024-11-20 794 WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); cbead2bdfcf1dd Leo Liu 2019-04-15 795 fba4761ca00f9e Alex Deucher 2024-11-20 796 data = RREG32_SOC15(VCN, i, mmUVD_CGC_CTRL); cbead2bdfcf1dd Leo Liu 2019-04-15 797 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 798 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 799 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 800 | UVD_CGC_CTRL__UDEC_DB_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 801 | UVD_CGC_CTRL__UDEC_MP_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 802 | UVD_CGC_CTRL__SYS_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 803 | UVD_CGC_CTRL__UDEC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 804 | UVD_CGC_CTRL__MPEG2_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 805 | UVD_CGC_CTRL__REGS_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 806 | UVD_CGC_CTRL__RBC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 807 | UVD_CGC_CTRL__LMI_MC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 808 | UVD_CGC_CTRL__LMI_UMC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 809 | UVD_CGC_CTRL__IDCT_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 810 | UVD_CGC_CTRL__MPRD_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 811 | UVD_CGC_CTRL__MPC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 812 | UVD_CGC_CTRL__LBSI_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 813 | UVD_CGC_CTRL__LRBBM_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 814 | UVD_CGC_CTRL__WCB_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 815 | UVD_CGC_CTRL__VCPU_MODE_MASK); fba4761ca00f9e Alex Deucher 2024-11-20 816 WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); cbead2bdfcf1dd Leo Liu 2019-04-15 817 fba4761ca00f9e Alex Deucher 2024-11-20 818 data = RREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL); cbead2bdfcf1dd Leo Liu 2019-04-15 819 data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 820 | UVD_SUVD_CGC_CTRL__SIT_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 821 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 822 | UVD_SUVD_CGC_CTRL__SCM_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 823 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 824 | UVD_SUVD_CGC_CTRL__SCLR_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 825 | UVD_SUVD_CGC_CTRL__UVD_SC_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 826 | UVD_SUVD_CGC_CTRL__ENT_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 827 | UVD_SUVD_CGC_CTRL__IME_MODE_MASK cbead2bdfcf1dd Leo Liu 2019-04-15 828 | UVD_SUVD_CGC_CTRL__SITE_MODE_MASK); fba4761ca00f9e Alex Deucher 2024-11-20 829 WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL, data); fba4761ca00f9e Alex Deucher 2024-11-20 830 } cbead2bdfcf1dd Leo Liu 2019-04-15 831 :::::: The code at line 781 was first introduced by commit :::::: cbead2bdfcf1ddaa3e65de22a3f88034736a71fd drm/amdgpu: add VCN2.5 VCPU start and stop :::::: TO: Leo Liu :::::: CC: Alex Deucher -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki