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([187.11.154.120]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7324254618dsm14074072b3a.26.2025.02.20.08.13.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 08:13:22 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH 1/3] target/riscv/cpu: ignore TCG init for KVM CPUs in reset_hold Date: Thu, 20 Feb 2025 13:13:11 -0300 Message-ID: <20250220161313.127376-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250220161313.127376-1-dbarboza@ventanamicro.com> References: <20250220161313.127376-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org riscv_cpu_reset_hold() does a lot of TCG-related initializations that aren't relevant for KVM, but nevertheless are impacting the reset state of KVM vcpus. When running a KVM guest, kvm_riscv_reset_vcpu() is called at the end of reset_hold(). At that point env->mstatus is initialized to a non-zero value, and it will be use to write 'sstatus' in the vcpu (kvm_arch_put_registers() then kvm_riscv_put_regs_csr()). Do an early exit in riscv_cpu_reset_hold() if we're running KVM. All the KVM reset procedure will be centered in kvm_riscv_reset_vcpu(). While we're at it, remove the kvm_enabled() check in kvm_riscv_reset_vcpu() since it's already being gated in riscv_cpu_reset_hold(). Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 9 +++++---- target/riscv/kvm/kvm-cpu.c | 3 --- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 522d6584e4..8e6e629ec4 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1050,6 +1050,11 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type) mcc->parent_phases.hold(obj, type); } #ifndef CONFIG_USER_ONLY + if (kvm_enabled()) { + kvm_riscv_reset_vcpu(cpu); + return; + } + env->misa_mxl = mcc->misa_mxl_max; env->priv = PRV_M; env->mstatus &= ~(MSTATUS_MIE | MSTATUS_MPRV); @@ -1146,10 +1151,6 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type) env->rnmip = 0; env->mnstatus = set_field(env->mnstatus, MNSTATUS_NMIE, false); } - - if (kvm_enabled()) { - kvm_riscv_reset_vcpu(cpu); - } #endif } diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 23ce779359..484b6afe7c 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1603,9 +1603,6 @@ void kvm_riscv_reset_vcpu(RISCVCPU *cpu) CPURISCVState *env = &cpu->env; int i; - if (!kvm_enabled()) { - return; - } for (i = 0; i < 32; i++) { env->gpr[i] = 0; } -- 2.48.1