From: "Jesse.zhang@amd.com" <jesse.zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
Lijo Lazar <lijo.lazar@amd.com>,
Jiadong Zhu <Jiadong.Zhu@amd.com>,
"Jesse.zhang@amd.com" <Jesse.zhang@amd.com>,
Jesse Zhang <jesse.zhang@amd.com>
Subject: [PATCH v6 1/3] drm/amd/amdgpu: Increase max rings to enable SDMA page ring
Date: Fri, 28 Feb 2025 18:27:09 +0800 [thread overview]
Message-ID: <20250228102711.832036-1-jesse.zhang@amd.com> (raw)
From: "Jesse.zhang@amd.com" <Jesse.zhang@amd.com>
Increase the maximum number of rings supported by the AMDGPU driver from 133 to 149.
This change is necessary to enable support for the SDMA page ring.
Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index b4fd1e17205e..bb2b66385223 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -37,7 +37,7 @@ struct amdgpu_job;
struct amdgpu_vm;
/* max number of rings */
-#define AMDGPU_MAX_RINGS 133
+#define AMDGPU_MAX_RINGS 149
#define AMDGPU_MAX_HWIP_RINGS 64
#define AMDGPU_MAX_GFX_RINGS 2
#define AMDGPU_MAX_SW_GFX_RINGS 2
--
2.25.1
next reply other threads:[~2025-02-28 10:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-28 10:27 Jesse.zhang@amd.com [this message]
2025-02-28 10:27 ` [PATCH V6 2/3] drm/amdgpu: Optimize VM invalidation engine allocation and synchronize GPU TLB flush Jesse.zhang@amd.com
2025-03-04 6:48 ` Zhang, Jesse(Jie)
2025-03-04 7:00 ` Lazar, Lijo
2025-02-28 10:27 ` [PATCH 3/3] drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA Jesse.zhang@amd.com
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