From: kernel test robot <lkp@intel.com>
To: oe-kbuild@lists.linux.dev
Cc: lkp@intel.com, Dan Carpenter <error27@gmail.com>
Subject: Re: [PATCH 4/8] enic: enable rq extended cq support
Date: Sun, 2 Mar 2025 22:29:31 +0800 [thread overview]
Message-ID: <202503022204.u6MW8MpW-lkp@intel.com> (raw)
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-4-c314f95812bb@cisco.com>
References: <20250227-enic_cleanup_and_ext_cq-v1-4-c314f95812bb@cisco.com>
TO: Satish Kharat via B4 Relay <devnull+satishkh.cisco.com@kernel.org>
TO: Christian Benvenuti <benve@cisco.com>
TO: Andrew Lunn <andrew+netdev@lunn.ch>
TO: "David S. Miller" <davem@davemloft.net>
CC: netdev@vger.kernel.org
TO: Eric Dumazet <edumazet@google.com>
TO: Jakub Kicinski <kuba@kernel.org>
TO: Paolo Abeni <pabeni@redhat.com>
CC: linux-kernel@vger.kernel.org
CC: Satish Kharat <satishkh@cisco.com>
CC: Nelson Escobar <neescoba@cisco.com>
CC: John Daley <johndale@cisco.com>
Hi Satish,
kernel test robot noticed the following build warnings:
[auto build test WARNING on de7a88b639d488607352a270ef2e052c4442b1b3]
url: https://github.com/intel-lab-lkp/linux/commits/Satish-Kharat-via-B4-Relay/enic-Move-function-from-header-file-to-c-file/20250228-083517
base: de7a88b639d488607352a270ef2e052c4442b1b3
patch link: https://lore.kernel.org/r/20250227-enic_cleanup_and_ext_cq-v1-4-c314f95812bb%40cisco.com
patch subject: [PATCH 4/8] enic: enable rq extended cq support
:::::: branch date: 3 days ago
:::::: commit date: 3 days ago
config: sparc-randconfig-r071-20250302 (https://download.01.org/0day-ci/archive/20250302/202503022204.u6MW8MpW-lkp@intel.com/config)
compiler: sparc-linux-gcc (GCC) 14.2.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202503022204.u6MW8MpW-lkp@intel.com/
smatch warnings:
drivers/net/ethernet/cisco/enic/enic_rq.c:94 enic_rq_cq_desc_dec() error: uninitialized symbol 'type_color'.
vim +/type_color +94 drivers/net/ethernet/cisco/enic/enic_rq.c
fe57762c649058 John Daley 2025-02-05 23
180b3e15104ce9 Satish Kharat 2025-02-27 24 static void enic_rq_cq_desc_dec(void *cq_desc, u8 cq_desc_size, u8 *type,
34d3abffbe44db Satish Kharat 2025-02-27 25 u8 *color, u16 *q_number, u16 *completed_index)
fe57762c649058 John Daley 2025-02-05 26 {
34d3abffbe44db Satish Kharat 2025-02-27 27 /* type_color is the last field for all cq structs */
180b3e15104ce9 Satish Kharat 2025-02-27 28 u8 type_color;
180b3e15104ce9 Satish Kharat 2025-02-27 29
180b3e15104ce9 Satish Kharat 2025-02-27 30 switch (cq_desc_size) {
180b3e15104ce9 Satish Kharat 2025-02-27 31 case VNIC_RQ_CQ_ENTRY_SIZE_16: {
180b3e15104ce9 Satish Kharat 2025-02-27 32 struct cq_enet_rq_desc *desc =
180b3e15104ce9 Satish Kharat 2025-02-27 33 (struct cq_enet_rq_desc *)cq_desc;
180b3e15104ce9 Satish Kharat 2025-02-27 34 type_color = desc->type_color;
180b3e15104ce9 Satish Kharat 2025-02-27 35
180b3e15104ce9 Satish Kharat 2025-02-27 36 /* Make sure color bit is read from desc *before* other fields
180b3e15104ce9 Satish Kharat 2025-02-27 37 * are read from desc. Hardware guarantees color bit is last
180b3e15104ce9 Satish Kharat 2025-02-27 38 * bit (byte) written. Adding the rmb() prevents the compiler
180b3e15104ce9 Satish Kharat 2025-02-27 39 * and/or CPU from reordering the reads which would potentially
180b3e15104ce9 Satish Kharat 2025-02-27 40 * result in reading stale values.
180b3e15104ce9 Satish Kharat 2025-02-27 41 */
180b3e15104ce9 Satish Kharat 2025-02-27 42 rmb();
180b3e15104ce9 Satish Kharat 2025-02-27 43
180b3e15104ce9 Satish Kharat 2025-02-27 44 *q_number = le16_to_cpu(desc->q_number_rss_type_flags) &
180b3e15104ce9 Satish Kharat 2025-02-27 45 CQ_DESC_Q_NUM_MASK;
180b3e15104ce9 Satish Kharat 2025-02-27 46 *completed_index = le16_to_cpu(desc->completed_index_flags) &
180b3e15104ce9 Satish Kharat 2025-02-27 47 CQ_DESC_COMP_NDX_MASK;
180b3e15104ce9 Satish Kharat 2025-02-27 48 break;
180b3e15104ce9 Satish Kharat 2025-02-27 49 }
180b3e15104ce9 Satish Kharat 2025-02-27 50 case VNIC_RQ_CQ_ENTRY_SIZE_32: {
180b3e15104ce9 Satish Kharat 2025-02-27 51 struct cq_enet_rq_desc_32 *desc =
180b3e15104ce9 Satish Kharat 2025-02-27 52 (struct cq_enet_rq_desc_32 *)cq_desc;
180b3e15104ce9 Satish Kharat 2025-02-27 53 type_color = desc->type_color;
180b3e15104ce9 Satish Kharat 2025-02-27 54
180b3e15104ce9 Satish Kharat 2025-02-27 55 /* Make sure color bit is read from desc *before* other fields
180b3e15104ce9 Satish Kharat 2025-02-27 56 * are read from desc. Hardware guarantees color bit is last
180b3e15104ce9 Satish Kharat 2025-02-27 57 * bit (byte) written. Adding the rmb() prevents the compiler
180b3e15104ce9 Satish Kharat 2025-02-27 58 * and/or CPU from reordering the reads which would potentially
180b3e15104ce9 Satish Kharat 2025-02-27 59 * result in reading stale values.
180b3e15104ce9 Satish Kharat 2025-02-27 60 */
180b3e15104ce9 Satish Kharat 2025-02-27 61 rmb();
180b3e15104ce9 Satish Kharat 2025-02-27 62
180b3e15104ce9 Satish Kharat 2025-02-27 63 *q_number = le16_to_cpu(desc->q_number_rss_type_flags) &
180b3e15104ce9 Satish Kharat 2025-02-27 64 CQ_DESC_Q_NUM_MASK;
180b3e15104ce9 Satish Kharat 2025-02-27 65 *completed_index = le16_to_cpu(desc->completed_index_flags) &
180b3e15104ce9 Satish Kharat 2025-02-27 66 CQ_DESC_COMP_NDX_MASK;
180b3e15104ce9 Satish Kharat 2025-02-27 67 *completed_index |= (desc->fetch_index_flags & CQ_DESC_32_FI_MASK) <<
180b3e15104ce9 Satish Kharat 2025-02-27 68 CQ_DESC_COMP_NDX_BITS;
180b3e15104ce9 Satish Kharat 2025-02-27 69 break;
180b3e15104ce9 Satish Kharat 2025-02-27 70 }
180b3e15104ce9 Satish Kharat 2025-02-27 71 case VNIC_RQ_CQ_ENTRY_SIZE_64: {
180b3e15104ce9 Satish Kharat 2025-02-27 72 struct cq_enet_rq_desc_64 *desc =
180b3e15104ce9 Satish Kharat 2025-02-27 73 (struct cq_enet_rq_desc_64 *)cq_desc;
180b3e15104ce9 Satish Kharat 2025-02-27 74 type_color = desc->type_color;
34d3abffbe44db Satish Kharat 2025-02-27 75
34d3abffbe44db Satish Kharat 2025-02-27 76 /* Make sure color bit is read from desc *before* other fields
34d3abffbe44db Satish Kharat 2025-02-27 77 * are read from desc. Hardware guarantees color bit is last
34d3abffbe44db Satish Kharat 2025-02-27 78 * bit (byte) written. Adding the rmb() prevents the compiler
34d3abffbe44db Satish Kharat 2025-02-27 79 * and/or CPU from reordering the reads which would potentially
34d3abffbe44db Satish Kharat 2025-02-27 80 * result in reading stale values.
34d3abffbe44db Satish Kharat 2025-02-27 81 */
34d3abffbe44db Satish Kharat 2025-02-27 82 rmb();
34d3abffbe44db Satish Kharat 2025-02-27 83
34d3abffbe44db Satish Kharat 2025-02-27 84 *q_number = le16_to_cpu(desc->q_number_rss_type_flags) &
34d3abffbe44db Satish Kharat 2025-02-27 85 CQ_DESC_Q_NUM_MASK;
34d3abffbe44db Satish Kharat 2025-02-27 86 *completed_index = le16_to_cpu(desc->completed_index_flags) &
34d3abffbe44db Satish Kharat 2025-02-27 87 CQ_DESC_COMP_NDX_MASK;
180b3e15104ce9 Satish Kharat 2025-02-27 88 *completed_index |= (desc->fetch_index_flags & CQ_DESC_64_FI_MASK) <<
180b3e15104ce9 Satish Kharat 2025-02-27 89 CQ_DESC_COMP_NDX_BITS;
180b3e15104ce9 Satish Kharat 2025-02-27 90 break;
180b3e15104ce9 Satish Kharat 2025-02-27 91 }
180b3e15104ce9 Satish Kharat 2025-02-27 92 }
180b3e15104ce9 Satish Kharat 2025-02-27 93
34d3abffbe44db Satish Kharat 2025-02-27 @94 *color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
34d3abffbe44db Satish Kharat 2025-02-27 95 *type = type_color & CQ_DESC_TYPE_MASK;
fe57762c649058 John Daley 2025-02-05 96 }
fe57762c649058 John Daley 2025-02-05 97
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next reply other threads:[~2025-03-02 14:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-02 14:29 kernel test robot [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-02-28 0:30 [PATCH 0/8] enic:enable 32, 64 byte cqes and get max rx/tx ring size from hw Satish Kharat
2025-02-28 0:30 ` [PATCH 4/8] enic: enable rq extended cq support Satish Kharat
2025-02-28 0:30 ` Satish Kharat via B4 Relay
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