From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Yicong Yang <yangyicong@huawei.com>
Cc: <will@kernel.org>, <mark.rutland@arm.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <prime.zeng@hisilicon.com>,
<linuxarm@huawei.com>, <yangyicong@hisilicon.com>,
<wangyushan12@huawei.com>
Subject: Re: [PATCH 8/9] drivers/perf: hisi: Add support for HiSilicon NoC PMU
Date: Tue, 4 Mar 2025 18:22:22 +0800 [thread overview]
Message-ID: <20250304182222.00006e5a@huawei.com> (raw)
In-Reply-To: <20250218092000.41641-9-yangyicong@huawei.com>
On Tue, 18 Feb 2025 17:19:59 +0800
Yicong Yang <yangyicong@huawei.com> wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
>
> Adds the support for HiSilicon NoC (Network on Chip) PMU which
> will be used to monitor the events on the system bus. The PMU
> device will be named after the SCL ID (either Super CPU cluster
> or Super IO cluster) and the index ID, just similar to other
> HiSilicon Uncore PMUs. Below PMU formats are provided besides
> the event:
>
> - ch: the transaction channel (data, request, response, etc) which
> can be used to filter the counting.
> - tt_en: tracetag filtering enable. Just as other HiSilicon Uncore
> PMUs the NoC PMU supports only counting the transactions with
> tracetag.
>
> The NoC PMU doesn't have an interrupt to indicate the overflow.
> However we have a 64 bit counter which is large enough and it's
> nearly impossible to overflow.
>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
A few minor comments inline.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> Documentation/admin-guide/perf/hisi-pmu.rst | 11 +
> drivers/perf/hisilicon/Makefile | 3 +-
> drivers/perf/hisilicon/hisi_uncore_noc_pmu.c | 391 +++++++++++++++++++
> 3 files changed, 404 insertions(+), 1 deletion(-)
> create mode 100644 drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
>
> diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst
> index 48992a0b8e94..d858bd3a8802 100644
> --- a/Documentation/admin-guide/perf/hisi-pmu.rst
> +++ b/Documentation/admin-guide/perf/hisi-pmu.rst
> @@ -112,6 +112,17 @@ uring channel. It is 2 bits. Some important codes are as follows:
> - 2'b00: default value, count the events which sent to the both uring and
> uring_ext channel;
>
> +6. ch: NoC PMU supports to filter the event counts of certain transaction
supports filtering the event counts...
> +channel with this option. The current supported channels are as follows:
> +
> +- 3'b010: Request channel
> +- 3'b100: Snoop channel
> +- 3'b110: Response channel
> +- 3'b111: Data channel
> +
> +7. tt_en: NoC PMU supports to only count the transactions with tracetag by
supports counting only transactions that have tracetag set if this option is
set.
> +this option. See the 2nd list for more information about tracetag.
> +
> +static int hisi_noc_pmu_probe(struct platform_device *pdev)
> +{
> + struct hisi_pmu *noc_pmu;
> + char *name;
> + int ret;
> +
> + noc_pmu = devm_kzalloc(&pdev->dev, sizeof(*noc_pmu), GFP_KERNEL);
Quite a bit of use of &pdev->dev, maybe worth
struct device *dev = &pdev->dev; to shorten all these lines.
> + if (!noc_pmu)
> + return -ENOMEM;
> +
> + /*
> + * HiSilicon Uncore PMU framework needs to get common hisi_pmu device
> + * by device's drvdata.
from device's drvdata
next prev parent reply other threads:[~2025-03-04 10:35 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 9:19 [PATCH 0/9] General updates and two new drivers for HiSilicon Uncore PMU Yicong Yang
2025-02-18 9:19 ` [PATCH 1/9] drivers/perf: hisi: Extend struct hisi_pmu_dev_info Yicong Yang
2025-03-01 6:23 ` Will Deacon
2025-03-03 14:43 ` Yicong Yang
2025-03-04 9:21 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 2/9] drivers/perf: hisi: Simplify the probe process for each DDRC version Yicong Yang
2025-03-04 9:26 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 3/9] drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver Yicong Yang
2025-03-04 9:27 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 4/9] drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information Yicong Yang
2025-03-01 6:43 ` Will Deacon
2025-03-04 9:49 ` Jonathan Cameron
2025-03-04 10:00 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 5/9] drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver Yicong Yang
2025-03-04 10:02 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 6/9] drivers/perf: hisi: Relax the event number check of v2 PMUs Yicong Yang
2025-03-04 10:11 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 7/9] drivers/perf: hisi: Support PMUs with no interrupt Yicong Yang
2025-03-04 10:16 ` Jonathan Cameron
2025-02-18 9:19 ` [PATCH 8/9] drivers/perf: hisi: Add support for HiSilicon NoC PMU Yicong Yang
2025-03-04 10:22 ` Jonathan Cameron [this message]
2025-02-18 9:20 ` [PATCH 9/9] drivers/perf: hisi: Add support for HiSilicon MN PMU driver Yicong Yang
2025-03-04 10:24 ` Jonathan Cameron
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