From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v6 10/29] hw/intc/aspeed: Support different memory region ops
Date: Fri, 7 Mar 2025 11:59:19 +0800 [thread overview]
Message-ID: <20250307035945.3698802-11-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250307035945.3698802-1-jamin_lin@aspeedtech.com>
The previous implementation set the "aspeed_intc_ops" struct, containing read
and write callbacks, to be used when I/O is performed on the INTC region.
Both "aspeed_intc_read" and "aspeed_intc_write" callback functions were used
for INTC (CPU Die).
To support the INTCIO (IO Die) model, introduces a new "reg_ops" class
attribute. This allows setting different memory region operations to support
different INTC models.
Will introduce "aspeed_intcio_read" and "aspeed_intcio_write" callback
functions are used for INTCIO.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/intc/aspeed_intc.h | 1 +
hw/intc/aspeed_intc.c | 5 ++++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/hw/intc/aspeed_intc.h b/include/hw/intc/aspeed_intc.h
index 208e764c4a..3433277d87 100644
--- a/include/hw/intc/aspeed_intc.h
+++ b/include/hw/intc/aspeed_intc.h
@@ -43,6 +43,7 @@ struct AspeedINTCClass {
uint64_t mem_size;
uint64_t nr_regs;
uint64_t reg_offset;
+ const MemoryRegionOps *reg_ops;
};
#endif /* ASPEED_INTC_H */
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index d06e697ecc..d8ee6e1c04 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -332,7 +332,7 @@ static void aspeed_intc_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(sbd, &s->iomem_container);
s->regs = g_new(uint32_t, aic->nr_regs);
- memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_intc_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s), aic->reg_ops, s,
TYPE_ASPEED_INTC ".regs", aic->nr_regs << 2);
memory_region_add_subregion(&s->iomem_container, aic->reg_offset,
@@ -359,12 +359,15 @@ static void aspeed_intc_unrealize(DeviceState *dev)
static void aspeed_intc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ AspeedINTCClass *aic = ASPEED_INTC_CLASS(klass);
dc->desc = "ASPEED INTC Controller";
dc->realize = aspeed_intc_realize;
dc->unrealize = aspeed_intc_unrealize;
device_class_set_legacy_reset(dc, aspeed_intc_reset);
dc->vmsd = NULL;
+
+ aic->reg_ops = &aspeed_intc_ops;
}
static const TypeInfo aspeed_intc_info = {
--
2.43.0
next prev parent reply other threads:[~2025-03-07 4:05 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-07 3:59 [PATCH v6 00/29] Support AST2700 A1 Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 01/29] hw/intc/aspeed: Support setting different memory size Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 02/29] hw/intc/aspeed: Rename status_addr and addr to status_reg and reg for clarity Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 03/29] hw/intc/aspeed: Introduce dynamic allocation for regs array Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 7:23 ` Cédric Le Goater
2025-03-07 3:59 ` [PATCH v6 04/29] hw/intc/aspeed: Support setting different register size Jamin Lin via
2025-03-07 7:23 ` Cédric Le Goater
2025-03-07 3:59 ` [PATCH v6 05/29] hw/intc/aspeed: Reduce regs array size by adding a register sub-region Jamin Lin via
2025-03-07 7:22 ` Cédric Le Goater
2025-03-07 3:59 ` [PATCH v6 06/29] hw/intc/aspeed: Introduce helper functions for enable and status registers Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 07/29] hw/intc/aspeed: Add object type name to trace events for better debugging Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 08/29] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 09/29] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via [this message]
2025-03-07 3:59 ` [PATCH v6 11/29] hw/intc/aspeed: Rename num_ints to num_inpins for clarity Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 12/29] hw/intc/aspeed: Add support for multiple output pins in INTC Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 13/29] hw/intc/aspeed: Refactor INTC to support separate input and output pin indices Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 14/29] hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 15/29] hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 16/29] hw/intc/aspeed: Add Support for Multi-Output IRQ Handling Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 17/29] hw/intc/aspeed: Add Support for AST2700 INTCIO Controller Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 18/29] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 19/29] hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 20/29] hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two Instances Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 21/29] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 22/29] hw/arm/aspeed_ast27x0: Add SoC Support " Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 23/29] hw/arm/aspeed: Add Machine " Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 24/29] hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 25/29] tests/functional/aspeed: Introduce start_ast2700_test API Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 26/29] tests/functional/aspeed: Update temperature hwmon path Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 27/29] tests/functional/aspeed: Update test ASPEED SDK v09.05 Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 28/29] tests/functional/aspeed: Add test case for AST2700 A1 Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 3:59 ` [PATCH v6 29/29] docs/specs: Add aspeed-intc Jamin Lin via
2025-03-07 3:59 ` Jamin Lin via
2025-03-07 7:33 ` [PATCH v6 00/29] Support AST2700 A1 Cédric Le Goater
2025-03-07 7:36 ` Jamin Lin
2025-03-07 7:44 ` Cédric Le Goater
2025-03-07 7:56 ` Steven Lee
2025-03-07 8:08 ` Cédric Le Goater
2025-03-07 17:47 ` Nabih Estefan
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