From: Aditya Gupta <adityag@linux.ibm.com>
To: "Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
"Madhavan Srinivasan" <maddy@linux.ibm.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Frédéric Barrat" <fbarrat@linux.ibm.com>
Cc: <qemu-devel@nongnu.org>, <qemu-ppc@nongnu.org>
Subject: [PATCH v5 2/8] ppc/pnv: Add a LPC controller for POWER11
Date: Sun, 9 Mar 2025 02:21:35 +0530 [thread overview]
Message-ID: <20250308205141.3219333-3-adityag@linux.ibm.com> (raw)
In-Reply-To: <20250308205141.3219333-1-adityag@linux.ibm.com>
Power11 core is same as Power10 core, declare PNV11_LPC as a child
class of PNV10_LPC, so it goes through same class init
Cc: Cédric Le Goater <clg@kaod.org>
Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
hw/ppc/pnv_lpc.c | 14 ++++++++++++++
include/hw/ppc/pnv_lpc.h | 4 ++++
2 files changed, 18 insertions(+)
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 0480a60f3f79..1623785b8be9 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -779,6 +779,19 @@ static const TypeInfo pnv_lpc_power10_info = {
.class_init = pnv_lpc_power10_class_init,
};
+static void pnv_lpc_power11_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->desc = "PowerNV LPC Controller POWER11";
+}
+
+static const TypeInfo pnv_lpc_power11_info = {
+ .name = TYPE_PNV11_LPC,
+ .parent = TYPE_PNV10_LPC,
+ .class_init = pnv_lpc_power11_class_init,
+};
+
static void pnv_lpc_realize(DeviceState *dev, Error **errp)
{
PnvLpcController *lpc = PNV_LPC(dev);
@@ -857,6 +870,7 @@ static void pnv_lpc_register_types(void)
type_register_static(&pnv_lpc_power8_info);
type_register_static(&pnv_lpc_power9_info);
type_register_static(&pnv_lpc_power10_info);
+ type_register_static(&pnv_lpc_power11_info);
}
type_init(pnv_lpc_register_types)
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 174add4c53be..c3f621fe8ce1 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -42,6 +42,10 @@ DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV9_LPC,
DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV10_LPC,
TYPE_PNV10_LPC)
+#define TYPE_PNV11_LPC TYPE_PNV_LPC "-POWER11"
+DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV11_LPC,
+ TYPE_PNV11_LPC)
+
struct PnvLpcController {
DeviceState parent;
--
2.48.1
next prev parent reply other threads:[~2025-03-08 20:53 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-08 20:51 [PATCH v5 0/8] Power11 support for QEMU [PowerNV] Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 1/8] ppc/pnv: Add HOMER for POWER11 Aditya Gupta
2025-03-08 20:51 ` Aditya Gupta [this message]
2025-03-08 20:51 ` [PATCH v5 3/8] ppc/pnv: Add OCC for Power11 Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 4/8] ppc/pnv: Add a PSI bridge model " Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 5/8] ppc/pnv: Add SBE " Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 6/8] ppc/pnv: Add ChipTOD " Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 7/8] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine Aditya Gupta
2025-03-09 14:08 ` Cédric Le Goater
2025-03-10 10:29 ` Aditya Gupta
2025-03-24 7:13 ` Aditya Gupta
2025-03-24 7:35 ` Cédric Le Goater
2025-03-24 8:38 ` Aditya Gupta
2025-03-08 20:51 ` [PATCH v5 8/8] ppc/pnv: Update skiboot to support Power11 Aditya Gupta
2025-03-09 14:10 ` Cédric Le Goater
2025-03-10 10:31 ` Aditya Gupta
2025-03-10 11:45 ` Cédric Le Goater
2025-03-10 14:59 ` Aditya Gupta
2025-03-10 15:33 ` Cédric Le Goater
2025-03-11 8:39 ` Nicholas Piggin
2025-03-11 8:46 ` Cédric Le Goater
2025-03-11 8:50 ` Aditya Gupta
2025-03-24 7:41 ` [PATCH v5 0/8] Power11 support for QEMU [PowerNV] Cédric Le Goater
2025-03-25 11:28 ` Aditya Gupta
2025-03-25 12:07 ` Cédric Le Goater
2025-03-25 17:11 ` Aditya Gupta
2025-03-25 17:16 ` Cédric Le Goater
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