From: Niklas Cassel <cassel@kernel.org>
To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org
Cc: linux-pci@vger.kernel.org, Damien Le Moal <dlemoal@kernel.org>,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Niklas Cassel <cassel@kernel.org>
Subject: [PATCH 3/7] selftests: pci_endpoint: Use IRQ_TYPE_* defines from UAPI header
Date: Mon, 10 Mar 2025 12:10:20 +0100 [thread overview]
Message-ID: <20250310111016.859445-12-cassel@kernel.org> (raw)
In-Reply-To: <20250310111016.859445-9-cassel@kernel.org>
In order to improve readability, use the IRQ_TYPE_* defines from the UAPI
header rather than using raw values.
No functional change.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
.../selftests/pci_endpoint/pci_endpoint_test.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c
index d05e107d0698..fdf4bc6aa9d2 100644
--- a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c
+++ b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c
@@ -99,11 +99,11 @@ TEST_F(pci_ep_basic, LEGACY_IRQ_TEST)
{
int ret;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 0);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_INTX);
ASSERT_EQ(0, ret) TH_LOG("Can't set Legacy IRQ type");
pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0);
- ASSERT_EQ(0, ret) TH_LOG("Can't get Legacy IRQ type");
+ ASSERT_EQ(PCITEST_IRQ_TYPE_INTX, ret) TH_LOG("Can't get Legacy IRQ type");
pci_ep_ioctl(PCITEST_LEGACY_IRQ, 0);
EXPECT_FALSE(ret) TH_LOG("Test failed for Legacy IRQ");
@@ -113,11 +113,11 @@ TEST_F(pci_ep_basic, MSI_TEST)
{
int ret, i;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI);
ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type");
pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0);
- ASSERT_EQ(1, ret) TH_LOG("Can't get MSI IRQ type");
+ ASSERT_EQ(PCITEST_IRQ_TYPE_MSI, ret) TH_LOG("Can't get MSI IRQ type");
for (i = 1; i <= 32; i++) {
pci_ep_ioctl(PCITEST_MSI, i);
@@ -129,11 +129,11 @@ TEST_F(pci_ep_basic, MSIX_TEST)
{
int ret, i;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 2);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSIX);
ASSERT_EQ(0, ret) TH_LOG("Can't set MSI-X IRQ type");
pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0);
- ASSERT_EQ(2, ret) TH_LOG("Can't get MSI-X IRQ type");
+ ASSERT_EQ(PCITEST_IRQ_TYPE_MSIX, ret) TH_LOG("Can't get MSI-X IRQ type");
for (i = 1; i <= 2048; i++) {
pci_ep_ioctl(PCITEST_MSIX, i);
@@ -181,7 +181,7 @@ TEST_F(pci_ep_data_transfer, READ_TEST)
if (variant->use_dma)
param.flags = PCITEST_FLAGS_USE_DMA;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI);
ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type");
for (i = 0; i < ARRAY_SIZE(test_size); i++) {
@@ -200,7 +200,7 @@ TEST_F(pci_ep_data_transfer, WRITE_TEST)
if (variant->use_dma)
param.flags = PCITEST_FLAGS_USE_DMA;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI);
ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type");
for (i = 0; i < ARRAY_SIZE(test_size); i++) {
@@ -219,7 +219,7 @@ TEST_F(pci_ep_data_transfer, COPY_TEST)
if (variant->use_dma)
param.flags = PCITEST_FLAGS_USE_DMA;
- pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1);
+ pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI);
ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type");
for (i = 0; i < ARRAY_SIZE(test_size); i++) {
--
2.48.1
next prev parent reply other threads:[~2025-03-10 11:10 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 11:10 [PATCH 0/7] pci_endpoint_test: Add support for PCITEST_IRQ_TYPE_AUTO Niklas Cassel
2025-03-10 11:10 ` [PATCH 1/7] PCI: endpoint: pcitest: Add IRQ_TYPE_* defines to UAPI header Niklas Cassel
2025-03-10 11:10 ` [PATCH 2/7] misc: pci_endpoint_test: Use IRQ_TYPE_* defines from " Niklas Cassel
2025-03-10 11:10 ` Niklas Cassel [this message]
2025-03-10 11:10 ` [PATCH 4/7] PCI: endpoint: Add intx_capable to epc_features Niklas Cassel
2025-03-21 21:50 ` Bjorn Helgaas
2025-03-21 21:55 ` Niklas Cassel
2025-03-21 22:42 ` Bjorn Helgaas
2025-03-26 6:25 ` Krzysztof Wilczyński
2025-03-10 11:10 ` [PATCH 5/7] PCI: dw-rockchip: EP mode cannot raise INTx interrupts Niklas Cassel
2025-03-10 11:10 ` [PATCH 6/7] PCI: endpoint: pci-epf-test: Expose supported IRQ types in CAPS register Niklas Cassel
2025-03-10 11:10 ` [PATCH 7/7] misc: pci_endpoint_test: Add support for PCITEST_IRQ_TYPE_AUTO Niklas Cassel
2025-03-14 12:45 ` Manivannan Sadhasivam
2025-03-14 17:25 ` Niklas Cassel
2025-03-18 8:56 ` Manivannan Sadhasivam
2025-03-18 9:45 ` Niklas Cassel
2025-03-18 10:38 ` Niklas Cassel
2025-03-10 13:47 ` [PATCH 0/7] " Krzysztof Wilczyński
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