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Thu, 13 Mar 2025 07:29:03 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::59a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d0a74d339sm54808835e9.14.2025.03.13.07.29.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 07:29:03 -0700 (PDT) Date: Thu, 13 Mar 2025 15:29:02 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland Subject: Re: [PATCH v3 15/17] RISC-V: KVM: add SBI extension reset callback Message-ID: <20250313-d269cf1812f8d080947fd64d@orel> References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-16-cleger@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250310151229.2365992-16-cleger@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250313_142906_242135_2EED40D2 X-CRM114-Status: GOOD ( 22.15 ) X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+kvm-riscv=archiver.kernel.org@lists.infradead.org On Mon, Mar 10, 2025 at 04:12:22PM +0100, Cl=E9ment L=E9ger wrote: > Currently, oonly the STA extension needed a reset function but that's only > going to be the case for FWFT as well. Add a reset callback that can be > implemented by SBI extensions. > = > Signed-off-by: Cl=E9ment L=E9ger > --- > arch/riscv/include/asm/kvm_host.h | 1 - > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 ++ > arch/riscv/kvm/vcpu.c | 2 +- > arch/riscv/kvm/vcpu_sbi.c | 24 ++++++++++++++++++++++++ > arch/riscv/kvm/vcpu_sbi_sta.c | 3 ++- > 5 files changed, 29 insertions(+), 3 deletions(-) > = > diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/k= vm_host.h > index cc33e35cd628..bb93d2995ea2 100644 > --- a/arch/riscv/include/asm/kvm_host.h > +++ b/arch/riscv/include/asm/kvm_host.h > @@ -409,7 +409,6 @@ void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); > = > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); > = > #endif /* __RISCV_KVM_HOST_H__ */ > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/a= sm/kvm_vcpu_sbi.h > index bcb90757b149..cb68b3a57c8f 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > @@ -57,6 +57,7 @@ struct kvm_vcpu_sbi_extension { > */ > int (*init)(struct kvm_vcpu *vcpu); > void (*deinit)(struct kvm_vcpu *vcpu); > + void (*reset)(struct kvm_vcpu *vcpu); > }; > = > void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *r= un); > @@ -78,6 +79,7 @@ bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu,= int idx); > int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); > void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu); > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu); > = > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long = reg_num, > unsigned long *reg_val); > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index 877bcc85c067..542747e2c7f5 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -94,7 +94,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) > vcpu->arch.hfence_tail =3D 0; > memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); > = > - kvm_riscv_vcpu_sbi_sta_reset(vcpu); > + kvm_riscv_vcpu_sbi_reset(vcpu); > = > /* Reset the guest CSRs for hotplug usecase */ > if (loaded) > diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c > index 858ddefd7e7f..18726096ef44 100644 > --- a/arch/riscv/kvm/vcpu_sbi.c > +++ b/arch/riscv/kvm/vcpu_sbi.c > @@ -539,3 +539,27 @@ void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu) > ext->deinit(vcpu); > } > } > + > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu) > +{ > + struct kvm_vcpu_sbi_context *scontext =3D &vcpu->arch.sbi_context; > + const struct kvm_riscv_sbi_extension_entry *entry; > + const struct kvm_vcpu_sbi_extension *ext; > + int idx, i; > + > + for (i =3D 0; i < ARRAY_SIZE(sbi_ext); i++) { > + entry =3D &sbi_ext[i]; > + ext =3D entry->ext_ptr; > + idx =3D entry->ext_idx; > + > + if (idx < 0 || idx >=3D ARRAY_SIZE(scontext->ext_status)) > + continue; > + > + if (scontext->ext_status[idx] !=3D KVM_RISCV_SBI_EXT_STATUS_ENABLED || > + !ext->reset) > + continue; > + > + ext->reset(vcpu); > + } > +} > + > diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c > index 5f35427114c1..cc6cb7c8f0e4 100644 > --- a/arch/riscv/kvm/vcpu_sbi_sta.c > +++ b/arch/riscv/kvm/vcpu_sbi_sta.c > @@ -16,7 +16,7 @@ > #include > #include > = > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > +static void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > { > vcpu->arch.sta.shmem =3D INVALID_GPA; > vcpu->arch.sta.last_steal =3D 0; > @@ -156,6 +156,7 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = =3D { > .extid_end =3D SBI_EXT_STA, > .handler =3D kvm_sbi_ext_sta_handler, > .probe =3D kvm_sbi_ext_sta_probe, > + .reset =3D kvm_riscv_vcpu_sbi_sta_reset, > }; > = > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, > -- = > 2.47.2 > Reviewed-by: Andrew Jones -- = kvm-riscv mailing list kvm-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kvm-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35478267F7D for ; Thu, 13 Mar 2025 14:29:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741876147; cv=none; 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Thu, 13 Mar 2025 07:29:03 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::59a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d0a74d339sm54808835e9.14.2025.03.13.07.29.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 07:29:03 -0700 (PDT) Date: Thu, 13 Mar 2025 15:29:02 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland Subject: Re: [PATCH v3 15/17] RISC-V: KVM: add SBI extension reset callback Message-ID: <20250313-d269cf1812f8d080947fd64d@orel> References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-16-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250310151229.2365992-16-cleger@rivosinc.com> On Mon, Mar 10, 2025 at 04:12:22PM +0100, Clément Léger wrote: > Currently, oonly the STA extension needed a reset function but that's only > going to be the case for FWFT as well. Add a reset callback that can be > implemented by SBI extensions. > > Signed-off-by: Clément Léger > --- > arch/riscv/include/asm/kvm_host.h | 1 - > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 ++ > arch/riscv/kvm/vcpu.c | 2 +- > arch/riscv/kvm/vcpu_sbi.c | 24 ++++++++++++++++++++++++ > arch/riscv/kvm/vcpu_sbi_sta.c | 3 ++- > 5 files changed, 29 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h > index cc33e35cd628..bb93d2995ea2 100644 > --- a/arch/riscv/include/asm/kvm_host.h > +++ b/arch/riscv/include/asm/kvm_host.h > @@ -409,7 +409,6 @@ void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); > > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); > > #endif /* __RISCV_KVM_HOST_H__ */ > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h > index bcb90757b149..cb68b3a57c8f 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > @@ -57,6 +57,7 @@ struct kvm_vcpu_sbi_extension { > */ > int (*init)(struct kvm_vcpu *vcpu); > void (*deinit)(struct kvm_vcpu *vcpu); > + void (*reset)(struct kvm_vcpu *vcpu); > }; > > void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run); > @@ -78,6 +79,7 @@ bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx); > int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); > void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu); > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu); > > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, > unsigned long *reg_val); > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index 877bcc85c067..542747e2c7f5 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -94,7 +94,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) > vcpu->arch.hfence_tail = 0; > memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); > > - kvm_riscv_vcpu_sbi_sta_reset(vcpu); > + kvm_riscv_vcpu_sbi_reset(vcpu); > > /* Reset the guest CSRs for hotplug usecase */ > if (loaded) > diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c > index 858ddefd7e7f..18726096ef44 100644 > --- a/arch/riscv/kvm/vcpu_sbi.c > +++ b/arch/riscv/kvm/vcpu_sbi.c > @@ -539,3 +539,27 @@ void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu) > ext->deinit(vcpu); > } > } > + > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu) > +{ > + struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; > + const struct kvm_riscv_sbi_extension_entry *entry; > + const struct kvm_vcpu_sbi_extension *ext; > + int idx, i; > + > + for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { > + entry = &sbi_ext[i]; > + ext = entry->ext_ptr; > + idx = entry->ext_idx; > + > + if (idx < 0 || idx >= ARRAY_SIZE(scontext->ext_status)) > + continue; > + > + if (scontext->ext_status[idx] != KVM_RISCV_SBI_EXT_STATUS_ENABLED || > + !ext->reset) > + continue; > + > + ext->reset(vcpu); > + } > +} > + > diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c > index 5f35427114c1..cc6cb7c8f0e4 100644 > --- a/arch/riscv/kvm/vcpu_sbi_sta.c > +++ b/arch/riscv/kvm/vcpu_sbi_sta.c > @@ -16,7 +16,7 @@ > #include > #include > > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > +static void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > { > vcpu->arch.sta.shmem = INVALID_GPA; > vcpu->arch.sta.last_steal = 0; > @@ -156,6 +156,7 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = { > .extid_end = SBI_EXT_STA, > .handler = kvm_sbi_ext_sta_handler, > .probe = kvm_sbi_ext_sta_probe, > + .reset = kvm_riscv_vcpu_sbi_sta_reset, > }; > > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, > -- > 2.47.2 > Reviewed-by: Andrew Jones From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D8AEC282DE for ; Thu, 13 Mar 2025 15:36:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 13 Mar 2025 07:29:03 -0700 (PDT) Date: Thu, 13 Mar 2025 15:29:02 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland Subject: Re: [PATCH v3 15/17] RISC-V: KVM: add SBI extension reset callback Message-ID: <20250313-d269cf1812f8d080947fd64d@orel> References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-16-cleger@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250310151229.2365992-16-cleger@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250313_142906_236247_EA49B576 X-CRM114-Status: GOOD ( 22.25 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Mar 10, 2025 at 04:12:22PM +0100, Cl=E9ment L=E9ger wrote: > Currently, oonly the STA extension needed a reset function but that's only > going to be the case for FWFT as well. Add a reset callback that can be > implemented by SBI extensions. > = > Signed-off-by: Cl=E9ment L=E9ger > --- > arch/riscv/include/asm/kvm_host.h | 1 - > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 ++ > arch/riscv/kvm/vcpu.c | 2 +- > arch/riscv/kvm/vcpu_sbi.c | 24 ++++++++++++++++++++++++ > arch/riscv/kvm/vcpu_sbi_sta.c | 3 ++- > 5 files changed, 29 insertions(+), 3 deletions(-) > = > diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/k= vm_host.h > index cc33e35cd628..bb93d2995ea2 100644 > --- a/arch/riscv/include/asm/kvm_host.h > +++ b/arch/riscv/include/asm/kvm_host.h > @@ -409,7 +409,6 @@ void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); > bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); > = > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); > = > #endif /* __RISCV_KVM_HOST_H__ */ > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/a= sm/kvm_vcpu_sbi.h > index bcb90757b149..cb68b3a57c8f 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > @@ -57,6 +57,7 @@ struct kvm_vcpu_sbi_extension { > */ > int (*init)(struct kvm_vcpu *vcpu); > void (*deinit)(struct kvm_vcpu *vcpu); > + void (*reset)(struct kvm_vcpu *vcpu); > }; > = > void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *r= un); > @@ -78,6 +79,7 @@ bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu,= int idx); > int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); > void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu); > void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu); > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu); > = > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long = reg_num, > unsigned long *reg_val); > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index 877bcc85c067..542747e2c7f5 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -94,7 +94,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) > vcpu->arch.hfence_tail =3D 0; > memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); > = > - kvm_riscv_vcpu_sbi_sta_reset(vcpu); > + kvm_riscv_vcpu_sbi_reset(vcpu); > = > /* Reset the guest CSRs for hotplug usecase */ > if (loaded) > diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c > index 858ddefd7e7f..18726096ef44 100644 > --- a/arch/riscv/kvm/vcpu_sbi.c > +++ b/arch/riscv/kvm/vcpu_sbi.c > @@ -539,3 +539,27 @@ void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu) > ext->deinit(vcpu); > } > } > + > +void kvm_riscv_vcpu_sbi_reset(struct kvm_vcpu *vcpu) > +{ > + struct kvm_vcpu_sbi_context *scontext =3D &vcpu->arch.sbi_context; > + const struct kvm_riscv_sbi_extension_entry *entry; > + const struct kvm_vcpu_sbi_extension *ext; > + int idx, i; > + > + for (i =3D 0; i < ARRAY_SIZE(sbi_ext); i++) { > + entry =3D &sbi_ext[i]; > + ext =3D entry->ext_ptr; > + idx =3D entry->ext_idx; > + > + if (idx < 0 || idx >=3D ARRAY_SIZE(scontext->ext_status)) > + continue; > + > + if (scontext->ext_status[idx] !=3D KVM_RISCV_SBI_EXT_STATUS_ENABLED || > + !ext->reset) > + continue; > + > + ext->reset(vcpu); > + } > +} > + > diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c > index 5f35427114c1..cc6cb7c8f0e4 100644 > --- a/arch/riscv/kvm/vcpu_sbi_sta.c > +++ b/arch/riscv/kvm/vcpu_sbi_sta.c > @@ -16,7 +16,7 @@ > #include > #include > = > -void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > +static void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) > { > vcpu->arch.sta.shmem =3D INVALID_GPA; > vcpu->arch.sta.last_steal =3D 0; > @@ -156,6 +156,7 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = =3D { > .extid_end =3D SBI_EXT_STA, > .handler =3D kvm_sbi_ext_sta_handler, > .probe =3D kvm_sbi_ext_sta_probe, > + .reset =3D kvm_riscv_vcpu_sbi_sta_reset, > }; > = > int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, > -- = > 2.47.2 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv