[PATCH] target/ppc: Add PIR to ppc_cpu_dump_state() for debug print out

[BALATON Zoltan <balaton@eik.bme.hu>]

Some CPU variants have a Processor Identification Register which was
not printed in register dump. Add it to ppc_cpu_dump_state() which is
used by debug options to print CPU register values.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 target/ppc/cpu_init.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 8b590e7f17..b1f32662ed 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7606,9 +7606,14 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
     int i;
 
     qemu_fprintf(f, "NIP " TARGET_FMT_lx "   LR " TARGET_FMT_lx " CTR "
-                 TARGET_FMT_lx " XER " TARGET_FMT_lx " CPU#%d\n",
-                 env->nip, env->lr, env->ctr, cpu_read_xer(env),
-                 cs->cpu_index);
+                 TARGET_FMT_lx " XER " TARGET_FMT_lx,
+                 env->nip, env->lr, env->ctr, cpu_read_xer(env));
+    if (env->spr_cb[SPR_PIR].name) {
+        qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_PIR]);
+    } else if (env->spr_cb[SPR_BOOKE_PIR].name) {
+        qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_BOOKE_PIR]);
+    }
+    qemu_fprintf(f, " CPU#%d\n", cs->cpu_index);
     qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx "  HF "
                  "%08x iidx %d didx %d\n",
                  env->msr, env->spr[SPR_HID0], env->hflags,
-- 
2.41.3