From: kernel test robot <lkp@intel.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: oe-kbuild-all@lists.linux.dev
Subject: [sudeep-holla:b4/plat2faux_dev 3/10] arch/arm64/include/asm/archrandom.h:93:undefined reference to `smccc_trng_available'
Date: Tue, 18 Mar 2025 01:15:27 +0800 [thread overview]
Message-ID: <202503180130.eZCLxXqV-lkp@intel.com> (raw)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux.git b4/plat2faux_dev
head: 311808e89f691de1648385823ca10d4bcdd72ea0
commit: 956d963234312b4891386248ca1feef218a9fb3b [3/10] hwrng: arm-smccc-trng - transition to the faux device interface
config: arm64-randconfig-001-20250317 (https://download.01.org/0day-ci/archive/20250318/202503180130.eZCLxXqV-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250318/202503180130.eZCLxXqV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503180130.eZCLxXqV-lkp@intel.com/
All errors (new ones prefixed by >>):
aarch64-linux-ld: drivers/char/random.o: in function `arch_get_random_seed_longs':
>> arch/arm64/include/asm/archrandom.h:93:(.text+0x714): undefined reference to `smccc_trng_available'
aarch64-linux-ld: drivers/char/random.o: relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `smccc_trng_available' which may bind externally can not be used when making a shared object; recompile with -fPIC
>> arch/arm64/include/asm/archrandom.h:93:(.text+0x714): dangerous relocation: unsupported relocation
>> aarch64-linux-ld: arch/arm64/include/asm/archrandom.h:93:(.text+0x71c): undefined reference to `smccc_trng_available'
vim +93 arch/arm64/include/asm/archrandom.h
1a50ec0b3b2e9a Richard Henderson 2020-01-21 81
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 82 static inline size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
1a50ec0b3b2e9a Richard Henderson 2020-01-21 83 {
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 84 if (!max_longs)
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 85 return 0;
38db987316a38a Andre Przywara 2021-01-06 86
38db987316a38a Andre Przywara 2021-01-06 87 /*
38db987316a38a Andre Przywara 2021-01-06 88 * We prefer the SMCCC call, since its semantics (return actual
38db987316a38a Andre Przywara 2021-01-06 89 * hardware backed entropy) is closer to the idea behind this
38db987316a38a Andre Przywara 2021-01-06 90 * function here than what even the RNDRSS register provides
38db987316a38a Andre Przywara 2021-01-06 91 * (the output of a pseudo RNG freshly seeded by a TRNG).
38db987316a38a Andre Przywara 2021-01-06 92 */
38db987316a38a Andre Przywara 2021-01-06 @93 if (smccc_trng_available) {
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 94 struct arm_smccc_res res;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 95
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 96 max_longs = min_t(size_t, 3, max_longs);
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 97 arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND64, max_longs * 64, &res);
38db987316a38a Andre Przywara 2021-01-06 98 if ((int)res.a0 >= 0) {
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 99 switch (max_longs) {
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 100 case 3:
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 101 *v++ = res.a1;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 102 fallthrough;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 103 case 2:
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 104 *v++ = res.a2;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 105 fallthrough;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 106 case 1:
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 107 *v++ = res.a3;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 108 break;
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 109 }
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 110 return max_longs;
38db987316a38a Andre Przywara 2021-01-06 111 }
38db987316a38a Andre Przywara 2021-01-06 112 }
38db987316a38a Andre Przywara 2021-01-06 113
1a50ec0b3b2e9a Richard Henderson 2020-01-21 114 /*
35bde68bba5413 Ard Biesheuvel 2022-01-13 115 * RNDRRS is not backed by an entropy source but by a DRBG that is
35bde68bba5413 Ard Biesheuvel 2022-01-13 116 * reseeded after each invocation. This is not a 100% fit but good
35bde68bba5413 Ard Biesheuvel 2022-01-13 117 * enough to implement this API if no other entropy source exists.
1a50ec0b3b2e9a Richard Henderson 2020-01-21 118 */
2c03e16f44993d Jason A. Donenfeld 2022-10-29 119 if (__cpu_has_rng() && __arm64_rndrrs(v))
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 120 return 1;
1a50ec0b3b2e9a Richard Henderson 2020-01-21 121
d349ab99eec7ab Jason A. Donenfeld 2022-07-17 122 return 0;
1a50ec0b3b2e9a Richard Henderson 2020-01-21 123 }
1a50ec0b3b2e9a Richard Henderson 2020-01-21 124
:::::: The code at line 93 was first introduced by commit
:::::: 38db987316a38a3fe55ff7f5f4653fcb520a9d26 arm64: Add support for SMCCC TRNG entropy source
:::::: TO: Andre Przywara <andre.przywara@arm.com>
:::::: CC: Will Deacon <will@kernel.org>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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