From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56E5CC3600B for ; Mon, 31 Mar 2025 14:45:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=QGIOZ3JlWqzbuYSQwoMXY2+agWFgzLTKyFeadMVFD6A=; b=Zc7PzILEyiMHytvULw6Mi6/tkq oEatmQSKRFPJGQEYGAHSeIfiBJvwOS2/MndENlssIwlajyzBj4VkYhGqgoLs+kkNvi0GGeQRo1Hwu NMt0lF9iaAG6zq8Zgd0nFG3ZIWxzLzNMd5T/PEeNexCCdJzKnkPEFf5A5FjxAtk4dbdgUDMPXusGg bIwpk9vD5skJguDo3NtwblL5B23iuivG4PWMtYVo07JLAjmS0ARO9v7+BPA41PaUs4Q3+PzuWOSPN eM+97pPR8bFhq8LOtdM6yKBIZn3DxcVHHNnW/i6qJpYmplaXJ1WMLpYYp56Xf/qnpuZMcxgg1qwrB 15GWb+yA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGO0-00000000cKJ-1gdB; Mon, 31 Mar 2025 14:45:12 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGDt-00000000ZYC-1jVh for linux-arm-kernel@lists.infradead.org; Mon, 31 Mar 2025 14:34:45 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 4508061126; Mon, 31 Mar 2025 14:34:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 11708C4CEE4; Mon, 31 Mar 2025 14:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743431684; bh=Q/k4m5b+O4/qJe7oLypmoL0kQq7LTjsImryXZvNM048=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rqSoh5qdHEnTqpW9NF0eI+v0xImawH4BZEamGhXkaLaUz2YpmEQ3JvQVMlR94Vdqu WVMtdrRMxk9ndssmUpOTLBv6H8ooVNZEsSdWRl7KaeSH8KYFVzlQ9FT92rrT9/sXFs tFl9Y7W4t0dn5WzDVoywiYKeBp/KqBqmdjxIUir40FirxU6VMm2BG+5XqJVlpsip3b yC7vafo5ueJqf/25Ox8l6lu5MluKDPlpzAjwt+VUqUvGQ8iLZus8JHZ55QbfT+oApy 71fv0iqxYqrKUTGVyPupXRBv/kaNIPMSFIPknHXb4Pde7fe8oalH1R+eloc82a9+cA dYR8Zu2bKGWqA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Douglas Anderson , Dmitry Baryshkov , Trilok Soni , Catalin Marinas , Sasha Levin , will@kernel.org, mark.rutland@arm.com, oliver.upton@linux.dev, shameerali.kolothum.thodi@huawei.com, maz@kernel.org, bwicaksono@nvidia.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 6.14 14/18] arm64: cputype: Add QCOM_CPU_PART_KRYO_3XX_GOLD Date: Mon, 31 Mar 2025 10:34:04 -0400 Message-Id: <20250331143409.1682789-14-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250331143409.1682789-1-sashal@kernel.org> References: <20250331143409.1682789-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.14 Content-Transfer-Encoding: 8bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Douglas Anderson [ Upstream commit 401c3333bb2396aa52e4121887a6f6a6e2f040bc ] Add a definition for the Qualcomm Kryo 300-series Gold cores. Reviewed-by: Dmitry Baryshkov Signed-off-by: Douglas Anderson Acked-by: Trilok Soni Link: https://lore.kernel.org/r/20241219131107.v3.1.I18e0288742871393228249a768e5d56ea65d93dc@changeid Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 6f3f4142e214f..c2da1661a44e6 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -119,6 +119,7 @@ #define QCOM_CPU_PART_KRYO 0x200 #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 +#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -196,6 +197,7 @@ #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) +#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) -- 2.39.5