From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32BFCC3600C for ; Mon, 31 Mar 2025 15:04:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=55Brhaev41dMvNnaDG+w2KVPwxaSIZFI1Ir1JGTD4IQ=; b=Ihvkjsq5X0vYXusVfSu7/5YAsd vd3QlnCGCofEKuMnGTZH6XTiE6OOcklDmU1lcoySdDAk/aLrLd/+bXg1QbwebnnlHSbbJ2waPND97 mwDbar4vLE5Cr1MGC/Mu7XynHvnDWxl1a52hywNsSaW2pkVZwtExnTI9XDxqJ6s/UvvHjindxC+Ku 8u7WOGDvaVt6ORR7PIj3eEmjg9dQ41m0gtzr/et4Z+kfwQ8+fFsbq0iOkS+36oYKjj9YYfBCc0qaU fFRTW/UeWqsYg07itFFoCjSAGTVaysVAODG+WIc+wESPMw1fYBHMSNU17OLTT5zb5bDngbqVWSrou +YO463eA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGgZ-00000000gzy-0bI1; Mon, 31 Mar 2025 15:04:23 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGFq-00000000aDf-2bJ5 for linux-arm-kernel@lists.infradead.org; Mon, 31 Mar 2025 14:36:46 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 7A6A8614B3; Mon, 31 Mar 2025 14:36:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3BCADC4CEE4; Mon, 31 Mar 2025 14:36:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743431805; bh=I61xE3ni3lGHVXYyEJNSPDvgOR5RNMogHt78sUy1r54=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ogWp3evjBV3CMp9x56ZNKmMsCtu/MR2fjY4OjoNAQa65UzRRX/Czd+F1oZBwM7NmQ t3eo/jxTiWC//8738ZmP7tipt3HbuS8nI0+UWn236atNCbl2gGARpsfNzdgPndpKYN nLSONakb3mv3NKXcjflYmlMTNZYSPW7NsJrr94ZfG5TUzpuOAsdEyDBl2UvntbdDog 2EyzCFA2K0OS1qSFl4uQC4KDsNKO8+24KdXOuAcPYCXIVNPUYzO4FVeOqcXGbeC2Af RLhPM/ojkn1rW9NnLy6tbvfXp1anDIRVcS64QUmHLX7dm9IGeuwjjXJ/1NHZutQbFD H/lAupuMddb9g== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Douglas Anderson , Dmitry Baryshkov , Trilok Soni , Catalin Marinas , Sasha Levin , will@kernel.org, mark.rutland@arm.com, oliver.upton@linux.dev, shameerali.kolothum.thodi@huawei.com, scott@os.amperecomputing.com, bwicaksono@nvidia.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 6.1 4/6] arm64: cputype: Add QCOM_CPU_PART_KRYO_3XX_GOLD Date: Mon, 31 Mar 2025 10:36:30 -0400 Message-Id: <20250331143634.1686409-4-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250331143634.1686409-1-sashal@kernel.org> References: <20250331143634.1686409-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.1.132 Content-Transfer-Encoding: 8bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Douglas Anderson [ Upstream commit 401c3333bb2396aa52e4121887a6f6a6e2f040bc ] Add a definition for the Qualcomm Kryo 300-series Gold cores. Reviewed-by: Dmitry Baryshkov Signed-off-by: Douglas Anderson Acked-by: Trilok Soni Link: https://lore.kernel.org/r/20241219131107.v3.1.I18e0288742871393228249a768e5d56ea65d93dc@changeid Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 8efc3302bf96b..a735215cb88ef 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -119,6 +119,7 @@ #define QCOM_CPU_PART_KRYO 0x200 #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 +#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -188,6 +189,7 @@ #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) +#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) -- 2.39.5