From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49B4BC3600B for ; Mon, 31 Mar 2025 15:08:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=MUuc808teZsJBc+fQu9nve2qB54rYl6hEqQTbVRI3gs=; b=mT4hkwmwsRXxhLmhoOY4VTKzHw l7QbTt2QOYE+8yb38U9I3xlwjtt7IBqrQh8hHHCGx8GeTQKya6HOWF+7Yv3i2Q37mq8taTP8wL2nj MLZ9xmL4e4nPqDaylnpa4zqDKryPswfd6RT8z1HzL/CmE+sXdDERjg11KTYzsRaEy6+7CwoIFOSKl l3v+gEqaU04AE+rAY68bqwFaLR53DKuei2JPdi5kvIkZH2Kw4+c30tFkL5r1d50hawNEz24F8mWJo KLH4rVP+vd0YioGIzqX9mTeVgeeSlyqamL999pkghG4Kq7odw6p4pqpHcnsM559gQ1OSQbTsPBSJz KDCi0RgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGjw-00000000hra-0fVA; Mon, 31 Mar 2025 15:07:52 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzGG8-00000000aK3-2iFO for linux-arm-kernel@lists.infradead.org; Mon, 31 Mar 2025 14:37:04 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 63D296116E; Mon, 31 Mar 2025 14:36:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 291C9C4CEE3; Mon, 31 Mar 2025 14:37:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743431823; bh=PyXYivHPTRgqifzVqcZTLi4bHziQq4FS8J5aLCVCnDE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PZVQVmrgMQKiu33+fcP3XefF8IzZikyivEvfSJNjXtwN7hNafqV3ZQSGG6w4Z39i+ rKklL58BkHdPmDLYEtdiKoYp9PBNOaNZbWiSiFiSZDErFtt0MOpB2+y0BxcWCR58zd 2ZwYSZqjXzjju4/b57hrSog4Go/J6mPazlpqmVASgPbZfBEQI2e/vR3vt0SHfKCu1O o1biuA2odCV9g+YPl16p00q+8bjGExTtLT9thOPmQpxNs/0naPIXGVkyzjyQcfEiJh ALcWann3wo+yrq2Ks5m23PMLoSgp0ZSk4Hliim9eSYHAH4Q8ThTVDTkod2hNs6vegs KaNhIretgrGzg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Douglas Anderson , Dmitry Baryshkov , Trilok Soni , Catalin Marinas , Sasha Levin , will@kernel.org, mark.rutland@arm.com, oliver.upton@linux.dev, shameerali.kolothum.thodi@huawei.com, maz@kernel.org, scott@os.amperecomputing.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.15 4/6] arm64: cputype: Add QCOM_CPU_PART_KRYO_3XX_GOLD Date: Mon, 31 Mar 2025 10:36:49 -0400 Message-Id: <20250331143652.1686503-4-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250331143652.1686503-1-sashal@kernel.org> References: <20250331143652.1686503-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 5.15.179 Content-Transfer-Encoding: 8bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Douglas Anderson [ Upstream commit 401c3333bb2396aa52e4121887a6f6a6e2f040bc ] Add a definition for the Qualcomm Kryo 300-series Gold cores. Reviewed-by: Dmitry Baryshkov Signed-off-by: Douglas Anderson Acked-by: Trilok Soni Link: https://lore.kernel.org/r/20241219131107.v3.1.I18e0288742871393228249a768e5d56ea65d93dc@changeid Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 7dfaad0fa17b7..f3729ef92e570 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -111,6 +111,7 @@ #define QCOM_CPU_PART_KRYO 0x200 #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 +#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -170,6 +171,7 @@ #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) +#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) -- 2.39.5