From: Rob Herring <robh@kernel.org>
To: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
Cc: thierry.bultel@linatsea.fr, linux-renesas-soc@vger.kernel.org,
geert@linux-m68k.org, paul.barker.ct@bp.renesas.com,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 02/13] dt-bindings: clock: Add cpg for the Renesas RZ/T2H SoC
Date: Mon, 31 Mar 2025 18:59:33 -0500 [thread overview]
Message-ID: <20250331235933.GA2857038-robh@kernel.org> (raw)
In-Reply-To: <20250331122657.3390355-3-thierry.bultel.yh@bp.renesas.com>
On Mon, Mar 31, 2025 at 02:26:43PM +0200, Thierry Bultel wrote:
> Document RZ/T2H (a.k.a r9a09g077) cpg-mssr (Clock Pulse Generator) binding.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
> ---
> Changes v5->v6:
> - Set clock minItem constraint
> - Moved additionalProperties after 'allOf' section
> Changes v4->v5:
> - Set reg minItems and maxItems defaults at top level
> Changes v3->v4:
> - Handle maxItems and clocks names properly in schema.
> ---
> .../bindings/clock/renesas,cpg-mssr.yaml | 57 +++++++++++++------
> .../clock/renesas,r9a09g077-cpg-mssr.h | 49 ++++++++++++++++
> 2 files changed, 90 insertions(+), 16 deletions(-)
> create mode 100644 include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
>
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> index 77ce3615c65a..dee4c44ef025 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> @@ -52,9 +52,11 @@ properties:
> - renesas,r8a779f0-cpg-mssr # R-Car S4-8
> - renesas,r8a779g0-cpg-mssr # R-Car V4H
> - renesas,r8a779h0-cpg-mssr # R-Car V4M
> + - renesas,r9a09g077-cpg-mssr # RZ/T2H
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
You need to define what each entry is. And do that here assuming the
first entry is the same in either case.
next prev parent reply other threads:[~2025-03-31 23:59 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 12:26 [PATCH v6 00/13] Add initial support for Renesas RZ/T2H SoC Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 01/13] dt-bindings: soc: Add Renesas RZ/T2H (R9A09G077) SoC Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 02/13] dt-bindings: clock: Add cpg for the Renesas RZ/T2H SoC Thierry Bultel
2025-03-31 23:59 ` Rob Herring [this message]
2025-04-01 12:20 ` Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 03/13] dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sci Thierry Bultel
2025-03-31 13:04 ` Geert Uytterhoeven
2025-03-31 13:55 ` Thierry Bultel
2025-03-31 14:27 ` Geert Uytterhoeven
2025-03-31 12:26 ` [PATCH v6 04/13] soc: renesas: Add RZ/T2H (R9A09G077) config option Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 05/13] clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 06/13] clk: renesas: Add support for R9A09G077 SoC Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 07/13] serial: sh-sci: Fix a comment about SCIFA Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 08/13] serial: sh-sci: Introduced function pointers Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 09/13] serial: sh-sci: Introduced sci_of_data Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 10/13] serial: sh-sci: Add support for RZ/T2H SCI Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 11/13] arm64: dts: renesas: Add initial support for renesas RZ/T2H SoC Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 12/13] arm64: dts: renesas: Add initial support for renesas RZ/T2H eval board Thierry Bultel
2025-03-31 13:00 ` Geert Uytterhoeven
2025-03-31 13:06 ` Thierry Bultel
2025-03-31 12:26 ` [PATCH v6 13/13] arm64: defconfig: Enable Renesas RZ/T2H serial SCI Thierry Bultel
2025-03-31 13:32 ` [PATCH v6 00/13] Add initial support for Renesas RZ/T2H SoC Rob Herring (Arm)
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