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From: Leo Yan <leo.yan@arm.com>
To: Jie Gan <quic_jiegan@quicinc.com>
Cc: James Clark <james.clark@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v1 9/9] coresight: Consolidate clock enabling
Date: Wed, 2 Apr 2025 10:01:47 +0100	[thread overview]
Message-ID: <20250402090147.GF115840@e132581.arm.com> (raw)
In-Reply-To: <8a34b1ac-5681-4cd8-b960-a154d8678fa2@quicinc.com>

Hi Jie,

[ + Rob ]

On Wed, Apr 02, 2025 at 08:55:51AM +0800, Jie Gan wrote:

[...]

> > >   {
> > > -    struct clk *pclk = NULL;
> > > +    WARN_ON(!pclk);
> > >       if (!dev_is_amba(dev)) {
> > > -        pclk = devm_clk_get_enabled(dev, "apb_pclk");
> > > -        if (IS_ERR(pclk))
> > > -            pclk = devm_clk_get_enabled(dev, "apb");
> > > +        *pclk = devm_clk_get_enabled(dev, "apb_pclk");
> > > +        if (IS_ERR(*pclk))
> > > +            *pclk = devm_clk_get_enabled(dev, "apb");
> > > +        if (IS_ERR(*pclk))
> > > +            return PTR_ERR(*pclk);
> > > +    } else {
> > > +        /* Don't enable pclk for an AMBA device */
> > > +        *pclk = NULL;
> > 
> > Now the "apb" clock won't be enabled for amba devices. I'm assuming
> > that's fine if the clock was always called "apb_pclk" for them, but the
> > commit that added the new clock name didn't specify any special casing
> > either.
> > 
> > Can we have a comment that says it's deliberate? But the more I think
> > about it the more I'm confused why CTCU needed a different clock name to
> > be defined, when all the other Coresight devices use "apb_pclk".
> 
> Hi James,
> 
> The original clock-name for CTCU is apb_pclk, but the dt-binding maintainer
> request me to change it to apb, that's why the clock name is different from
> others.
> 
> I am not why we need apb instead of apb_pclk in dt-binding. Maybe some rules
> have changed for dt-binding requirement.

My conclusion is that if a device is an Arm Primecell peripheral, it
should use the clock name "apb_pclk" (See the DT binding doc [1]).

CTCU is not an Arm Primecell peripheral, so it does not need to strictly
follow up the clock naming for Primecell peripheral.

In Arm CoreSight framework, for code consistency, I would suggest
using the clock naming "apb_pclk" for the APB clock for a newly added
device that even it is not a Primecell peripheral.

(We don't need to make any change to the CTCU driver, as we need to
remain compatible with existed DTB blobs).

Cc'ing Rob in case he has any suggestions.

Thanks,
Leo

[1] Documentation/devicetree/bindings/arm/primecell.yaml


  reply	other threads:[~2025-04-02  9:03 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-27 11:37 [PATCH v1 0/9] coresight: Fix and improve clock usage Leo Yan
2025-03-27 11:37 ` [PATCH v1 1/9] coresight: tmc: Support atclk Leo Yan
2025-04-03  5:50   ` Anshuman Khandual
2025-04-22  8:21     ` Leo Yan
2025-03-27 11:37 ` [PATCH v1 2/9] coresight: catu: " Leo Yan
2025-04-03  6:02   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 3/9] coresight: etm4x: " Leo Yan
2025-04-03  6:23   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 4/9] coresight: Disable programming clock properly Leo Yan
2025-03-27 11:37 ` [PATCH v1 5/9] coresight: Avoid enable programming clock duplicately Leo Yan
2025-04-03  6:48   ` Anshuman Khandual
2025-04-22 12:24     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 6/9] coresight: Disable trace bus clock properly Leo Yan
2025-04-03  7:25   ` Anshuman Khandual
2025-04-22 12:29     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 7/9] coresight: Make clock sequence consistent Leo Yan
2025-04-03  7:10   ` Anshuman Khandual
2025-04-22  9:21     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 8/9] coresight: Refactor runtime PM Leo Yan
2025-03-27 11:38 ` [PATCH v1 9/9] coresight: Consolidate clock enabling Leo Yan
2025-04-01 14:58   ` James Clark
2025-04-01 15:29     ` Leo Yan
2025-04-02  0:55     ` Jie Gan
2025-04-02  9:01       ` Leo Yan [this message]
2025-04-03  0:29         ` Jie Gan

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