From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>
Subject: [PATCH] drm/xe: Fix xe_pt_stage_bind_walk kerneldoc
Date: Wed, 2 Apr 2025 14:29:24 +0200 [thread overview]
Message-ID: <20250402122924.25526-1-thomas.hellstrom@linux.intel.com> (raw)
The structure was missing a proper kerneldoc header and once
that was added a number of typos and errors became obvious.
Fix those.
Reported-by: Lucas De Marchi <lucas.demarchi@intel.com>
Closes: https://lore.kernel.org/intel-xe/x53tcs5bjldw6lcorjemuheklxcmepdvr2u7lvt3hpqrzqoc4h@nsu6hs25taqj/
Fixes: b2d4b03b03a7 ("drm/xe: Make the PT code handle placement per PTE rather than per vma / range")
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/xe/xe_pt.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 82ae159feed1..33839b25d708 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -269,8 +269,11 @@ struct xe_pt_update {
bool preexisting;
};
+/**
+ * struct xe_pt_stage_bind_walk - Walk state for the stage_bind walk.
+ */
struct xe_pt_stage_bind_walk {
- /** base: The base class. */
+ /** @base: The base class. */
struct xe_pt_walk base;
/* Input parameters for the walk */
@@ -278,14 +281,14 @@ struct xe_pt_stage_bind_walk {
struct xe_vm *vm;
/** @tile: The tile we're building for. */
struct xe_tile *tile;
- /** @default_pte: PTE flag only template for VRAM. No address is associated */
+ /** @default_vram_pte: PTE flag only template for VRAM. No address is associated */
u64 default_vram_pte;
- /** @default_pte: PTE flag only template for VRAM. No address is associated */
+ /** @default_system_pte: PTE flag only template for System. No address is associated */
u64 default_system_pte;
/** @dma_offset: DMA offset to add to the PTE. */
u64 dma_offset;
/**
- * @needs_64k: This address range enforces 64K alignment and
+ * @needs_64K: This address range enforces 64K alignment and
* granularity on VRAM.
*/
bool needs_64K;
@@ -301,6 +304,7 @@ struct xe_pt_stage_bind_walk {
u64 va_curs_start;
/* Output */
+ /** @wupd: Walk output data for page-table updates. */
struct xe_walk_update {
/** @wupd.entries: Caller provided storage. */
struct xe_vm_pgtable_update *entries;
@@ -318,7 +322,7 @@ struct xe_pt_stage_bind_walk {
u64 l0_end_addr;
/** @addr_64K: The start address of the current 64K chunk. */
u64 addr_64K;
- /** @found_64: Whether @add_64K actually points to a 64K chunk. */
+ /** @found_64K: Whether @add_64K actually points to a 64K chunk. */
bool found_64K;
};
--
2.48.1
next reply other threads:[~2025-04-02 12:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-02 12:29 Thomas Hellström [this message]
2025-04-02 16:49 ` [PATCH] drm/xe: Fix xe_pt_stage_bind_walk kerneldoc Lucas De Marchi
2025-04-03 6:20 ` ✓ CI.Patch_applied: success for " Patchwork
2025-04-03 6:20 ` ✓ CI.checkpatch: " Patchwork
2025-04-03 6:21 ` ✓ CI.KUnit: " Patchwork
2025-04-03 6:38 ` ✓ CI.Build: " Patchwork
2025-04-03 6:40 ` ✓ CI.Hooks: " Patchwork
2025-04-03 6:42 ` ✓ CI.checksparse: " Patchwork
2025-04-03 7:01 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-03 8:10 ` ✗ Xe.CI.Full: failure " Patchwork
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