From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Fabiano Rosas <farosas@suse.de>,
Laurent Vivier <lvivier@redhat.com>,
Phil Dennis-Jordan <phil@philjordan.eu>,
Bernhard Beschow <shentey@gmail.com>
Subject: [PATCH v3 2/8] hw/usb/xhci: Rename and move HCD register region constants to header
Date: Fri, 11 Apr 2025 17:58:44 +1000 [thread overview]
Message-ID: <20250411075851.206995-3-npiggin@gmail.com> (raw)
In-Reply-To: <20250411075851.206995-1-npiggin@gmail.com>
This also adds some missing constants rather than open-coding
offsets and sizes.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/usb/hcd-xhci.h | 16 ++++++++++++++++
hw/usb/hcd-xhci.c | 48 ++++++++++++++++++++++-------------------------
2 files changed, 38 insertions(+), 26 deletions(-)
diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h
index ee364efd0ab..20059fcf66c 100644
--- a/hw/usb/hcd-xhci.h
+++ b/hw/usb/hcd-xhci.h
@@ -115,6 +115,22 @@ typedef enum TRBCCode {
CC_SPLIT_TRANSACTION_ERROR
} TRBCCode;
+/* Register regions */
+#define XHCI_REGS_LENGTH_CAP 0x40
+#define XHCI_REGS_LENGTH_OPER 0x400
+#define XHCI_REGS_LENGTH_PORT (XHCI_PORT_PR_SZ * XHCI_MAXPORTS)
+#define XHCI_REGS_LENGTH_RUNTIME ((XHCI_MAXINTRS + 1) * XHCI_INTR_IR_SZ)
+/* XXX: Should doorbell length be *4 rather than *32? */
+#define XHCI_REGS_LENGTH_DOORBELL ((XHCI_MAXSLOTS + 1) * 0x20)
+
+#define XHCI_REGS_OFFSET_CAP 0
+#define XHCI_REGS_OFFSET_OPER (XHCI_REGS_OFFSET_CAP + \
+ XHCI_REGS_LENGTH_CAP)
+#define XHCI_REGS_OFFSET_PORT (XHCI_REGS_OFFSET_OPER + \
+ XHCI_REGS_LENGTH_OPER)
+#define XHCI_REGS_OFFSET_RUNTIME 0x1000
+#define XHCI_REGS_OFFSET_DOORBELL 0x2000
+
/* Register definitions */
#define XHCI_HCCAP_REG_CAPLENGTH 0x00
#define XHCI_HCCAP_REG_HCIVERSION 0x02
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index b57db309b8d..7470db38561 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -46,22 +46,14 @@
#define COMMAND_LIMIT 256
#define TRANSFER_LIMIT 256
-#define LEN_CAP 0x40
-#define LEN_OPER (0x400 + XHCI_PORT_PR_SZ * XHCI_MAXPORTS)
-#define LEN_RUNTIME ((XHCI_MAXINTRS + 1) * XHCI_INTR_IR_SZ)
-#define LEN_DOORBELL ((XHCI_MAXSLOTS + 1) * 0x20)
-
-#define OFF_OPER LEN_CAP
-#define OFF_RUNTIME 0x1000
-#define OFF_DOORBELL 0x2000
-
-#if (OFF_OPER + LEN_OPER) > OFF_RUNTIME
-#error Increase OFF_RUNTIME
+#if (XHCI_REGS_OFFSET_PORT + XHCI_REGS_LENGTH_PORT) > XHCI_REGS_OFFSET_RUNTIME
+#error Increase XHCI_REGS_OFFSET_RUNTIME
#endif
-#if (OFF_RUNTIME + LEN_RUNTIME) > OFF_DOORBELL
-#error Increase OFF_DOORBELL
+#if (XHCI_REGS_OFFSET_RUNTIME + XHCI_REGS_LENGTH_RUNTIME) > \
+ XHCI_REGS_OFFSET_DOORBELL
+#error Increase XHCI_REGS_OFFSET_DOORBELL
#endif
-#if (OFF_DOORBELL + LEN_DOORBELL) > XHCI_LEN_REGS
+#if (XHCI_REGS_OFFSET_DOORBELL + XHCI_REGS_LENGTH_DOORBELL) > XHCI_LEN_REGS
# error Increase XHCI_LEN_REGS
#endif
@@ -2583,7 +2575,7 @@ static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size)
switch (reg) {
case XHCI_HCCAP_REG_CAPLENGTH: /* Covers HCIVERSION and CAPLENGTH */
- ret = 0x01000000 | LEN_CAP;
+ ret = 0x01000000 | XHCI_REGS_LENGTH_CAP;
break;
case XHCI_HCCAP_REG_HCSPARAMS1:
ret = ((xhci->numports_2+xhci->numports_3)<<24)
@@ -2603,10 +2595,10 @@ static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size)
}
break;
case XHCI_HCCAP_REG_DBOFF:
- ret = OFF_DOORBELL;
+ ret = XHCI_REGS_OFFSET_DOORBELL;
break;
case XHCI_HCCAP_REG_RTSOFF:
- ret = OFF_RUNTIME;
+ ret = XHCI_REGS_OFFSET_RUNTIME;
break;
/* extended capabilities */
@@ -3256,22 +3248,26 @@ static void usb_xhci_realize(DeviceState *dev, Error **errp)
memory_region_init(&xhci->mem, OBJECT(dev), "xhci", XHCI_LEN_REGS);
memory_region_init_io(&xhci->mem_cap, OBJECT(dev), &xhci_cap_ops, xhci,
- "capabilities", LEN_CAP);
+ "capabilities", XHCI_REGS_LENGTH_CAP);
memory_region_init_io(&xhci->mem_oper, OBJECT(dev), &xhci_oper_ops, xhci,
- "operational", 0x400);
+ "operational", XHCI_REGS_LENGTH_OPER);
memory_region_init_io(&xhci->mem_runtime, OBJECT(dev), &xhci_runtime_ops,
- xhci, "runtime", LEN_RUNTIME);
+ xhci, "runtime", XHCI_REGS_LENGTH_RUNTIME);
memory_region_init_io(&xhci->mem_doorbell, OBJECT(dev), &xhci_doorbell_ops,
- xhci, "doorbell", LEN_DOORBELL);
+ xhci, "doorbell", XHCI_REGS_LENGTH_DOORBELL);
- memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap);
- memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper);
- memory_region_add_subregion(&xhci->mem, OFF_RUNTIME, &xhci->mem_runtime);
- memory_region_add_subregion(&xhci->mem, OFF_DOORBELL, &xhci->mem_doorbell);
+ memory_region_add_subregion(&xhci->mem, XHCI_REGS_OFFSET_CAP,
+ &xhci->mem_cap);
+ memory_region_add_subregion(&xhci->mem, XHCI_REGS_OFFSET_OPER,
+ &xhci->mem_oper);
+ memory_region_add_subregion(&xhci->mem, XHCI_REGS_OFFSET_RUNTIME,
+ &xhci->mem_runtime);
+ memory_region_add_subregion(&xhci->mem, XHCI_REGS_OFFSET_DOORBELL,
+ &xhci->mem_doorbell);
for (i = 0; i < xhci->numports; i++) {
XHCIPort *port = &xhci->ports[i];
- uint32_t offset = OFF_OPER + 0x400 + XHCI_PORT_PR_SZ * i;
+ uint32_t offset = XHCI_REGS_OFFSET_PORT + XHCI_PORT_PR_SZ * i;
port->xhci = xhci;
memory_region_init_io(&port->mem, OBJECT(dev), &xhci_port_ops, port,
port->name, XHCI_PORT_PR_SZ);
--
2.47.1
next prev parent reply other threads:[~2025-04-11 8:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-11 7:58 [PATCH v3 0/8] usb/xhci: TR NOOP, TI HCD device, more qtests Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 1/8] hw/usb/xhci: Move HCD constants to a header and add register constants Nicholas Piggin
2025-04-11 7:58 ` Nicholas Piggin [this message]
2025-04-11 7:58 ` [PATCH v3 3/8] tests/qtest/xhci: Add controller and device setup and ring tests Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 4/8] hw/usb/xhci: Support TR NOOP commands Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 5/8] tests/qtest/xhci: add a test for " Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 6/8] tests/qtest/xhci: test the qemu-xhci device Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 7/8] hw/usb/hcd-xhci-pci: Make PCI device more configurable Nicholas Piggin
2025-04-11 7:58 ` [PATCH v3 8/8] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller model Nicholas Piggin
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