All of lore.kernel.org
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: hans.zhang@cixtech.com, bhelgaas@google.com,
	lpieralisi@kernel.org, kw@linux.com,
	manivannan.sadhasivam@linaro.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Manikandan K Pillai <mpillai@cadence.com>,
	Hans Zhang <hans.zhang@cixtech.com>
Subject: Re: [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller
Date: Mon, 14 Apr 2025 17:20:20 +0800	[thread overview]
Message-ID: <202504141719.svx3rf5x-lkp@intel.com> (raw)
In-Reply-To: <20250411103656.2740517-6-hans.zhang@cixtech.com>

Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on a24588245776dafc227243a01bfbeb8a59bafba9]

url:    https://github.com/intel-lab-lkp/linux/commits/hans-zhang-cixtech-com/dt-bindings-pci-cadence-Extend-compatible-for-new-RP-configuration/20250414-094836
base:   a24588245776dafc227243a01bfbeb8a59bafba9
patch link:    https://lore.kernel.org/r/20250411103656.2740517-6-hans.zhang%40cixtech.com
patch subject: [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller
config: powerpc64-randconfig-001-20250414 (https://download.01.org/0day-ci/archive/20250414/202504141719.svx3rf5x-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250414/202504141719.svx3rf5x-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504141719.svx3rf5x-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/pci/controller/cadence/pcie-cadence.c:303:12: warning: variable 'ctrl0' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
     303 |                 desc1 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN(fn);
         |                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pci/controller/cadence/pcie-cadence.h:342:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN'
     342 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN_MASK, devfn)
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/bitfield.h:115:3: note: expanded from macro 'FIELD_PREP'
     115 |                 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");    \
         |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/bitfield.h:68:3: note: expanded from macro '__BF_FIELD_CHECK'
      68 |                 BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ?           \
         |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      69 |                                  ~((_mask) >> __bf_shf(_mask)) &        \
         |                                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      70 |                                         (0 + (_val)) : 0,               \
         |                                         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      71 |                                  _pfx "value too large for the field"); \
         |                                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   include/linux/compiler_types.h:557:2: note: expanded from macro 'compiletime_assert'
     557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/compiler_types.h:545:2: note: expanded from macro '_compiletime_assert'
     545 |         __compiletime_assert(condition, msg, prefix, suffix)
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/compiler_types.h:537:7: note: expanded from macro '__compiletime_assert'
     537 |                 if (!(condition))                                       \
         |                     ^~~~~~~~~~~~
   drivers/pci/controller/cadence/pcie-cadence.c:323:46: note: uninitialized use occurs here
     323 |                              CDNS_PCIE_HPA_AT_OB_REGION_CTRL0(r), ctrl0);
         |                                                                   ^~~~~
   drivers/pci/controller/cadence/pcie-cadence.c:303:12: note: remove the 'if' if its condition is always true
     303 |                 desc1 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN(fn);
         |                          ^
   drivers/pci/controller/cadence/pcie-cadence.h:342:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN'
     342 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN_MASK, devfn)
         |         ^
   include/linux/bitfield.h:115:3: note: expanded from macro 'FIELD_PREP'
     115 |                 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");    \
         |                 ^
   include/linux/bitfield.h:68:3: note: expanded from macro '__BF_FIELD_CHECK'
      68 |                 BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ?           \
         |                 ^
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   include/linux/compiler_types.h:557:2: note: expanded from macro 'compiletime_assert'
     557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
         |         ^
   include/linux/compiler_types.h:545:2: note: expanded from macro '_compiletime_assert'
     545 |         __compiletime_assert(condition, msg, prefix, suffix)
         |         ^
   include/linux/compiler_types.h:537:3: note: expanded from macro '__compiletime_assert'
     537 |                 if (!(condition))                                       \
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.c:291:39: note: initialize the variable 'ctrl0' to silence this warning
     291 |         u32 addr0, addr1, desc0, desc1, ctrl0;
         |                                              ^
         |                                               = 0
   1 warning generated.
--
>> drivers/pci/controller/cadence/pcie-cadence-host.c:122:3: warning: variable 'desc0' is uninitialized when used here [-Wuninitialized]
     122 |                 desc0 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_CONF_TYPE0;
         |                 ^~~~~
   drivers/pci/controller/cadence/pcie-cadence-host.c:80:18: note: initialize the variable 'desc0' to silence this warning
      80 |         u32 addr0, desc0, desc1, ctrl0;
         |                         ^
         |                          = 0
   1 warning generated.


vim +303 drivers/pci/controller/cadence/pcie-cadence.c

   286	
   287	void cdns_pcie_hpa_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie,
   288							      u8 busnr, u8 fn,
   289							      u32 r, u64 cpu_addr)
   290	{
   291		u32 addr0, addr1, desc0, desc1, ctrl0;
   292	
   293		desc0 = CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_NORMAL_MSG;
   294		desc1 = 0;
   295	
   296		/* See cdns_pcie_set_outbound_region() comments above. */
   297		if (pcie->is_rc) {
   298			desc1 = CDNS_PCIE_HPA_AT_OB_REGION_DESC1_BUS(busnr) |
   299				CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN(0);
   300			ctrl0 = CDNS_PCIE_HPA_AT_OB_REGION_CTRL0_SUPPLY_BUS |
   301				CDNS_PCIE_HPA_AT_OB_REGION_CTRL0_SUPPLY_DEV_FN;
   302		} else {
 > 303			desc1 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN(fn);
   304		}
   305	
   306		addr0 = CDNS_PCIE_HPA_AT_OB_REGION_CPU_ADDR0_NBITS(17) |
   307			(lower_32_bits(cpu_addr) & GENMASK(31, 8));
   308		addr1 = upper_32_bits(cpu_addr);
   309	
   310		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   311				     CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0(r), 0);
   312		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   313				     CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR1(r), 0);
   314		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   315				     CDNS_PCIE_HPA_AT_OB_REGION_DESC0(r), desc0);
   316		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   317				     CDNS_PCIE_HPA_AT_OB_REGION_DESC1(r), desc1);
   318		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   319				     CDNS_PCIE_HPA_AT_OB_REGION_CPU_ADDR0(r), addr0);
   320		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   321				     CDNS_PCIE_HPA_AT_OB_REGION_CPU_ADDR1(r), addr1);
   322		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   323				     CDNS_PCIE_HPA_AT_OB_REGION_CTRL0(r), ctrl0);
   324	}
   325	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

  parent reply	other threads:[~2025-04-14  9:20 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-11 10:36 [PATCH v3 0/6] Enhance the PCIe controller driver hans.zhang
2025-04-11 10:36 ` [PATCH v3 1/6] dt-bindings: pci: cadence: Extend compatible for new RP configuration hans.zhang
2025-04-11 19:56   ` Rob Herring
2025-04-14  3:05     ` Manikandan Karunakaran Pillai
2025-04-11 10:36 ` [PATCH v3 2/6] dt-bindings: pci: cadence: Extend compatible for new EP configurations hans.zhang
2025-04-11 10:36 ` [PATCH v3 3/6] PCI: cadence: Add header support for PCIe HPA controller hans.zhang
2025-04-11 20:31   ` Rob Herring
2025-04-12 15:19     ` Hans Zhang
2025-04-11 10:36 ` [PATCH v3 4/6] PCI: cadence: Add support for PCIe Endpoint " hans.zhang
2025-04-11 10:36 ` [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller hans.zhang
2025-04-11 20:24   ` Rob Herring
2025-04-12 15:45     ` Hans Zhang
2025-04-12 16:02       ` Hans Zhang
2025-04-14  3:52     ` Manikandan Karunakaran Pillai
2025-04-24  2:58       ` Rob Herring
2025-04-24  3:53         ` Manikandan Karunakaran Pillai
2025-04-24 15:07           ` Rob Herring
2025-04-14  4:13   ` kernel test robot
2025-04-14  7:47   ` kernel test robot
2025-04-14  9:20   ` kernel test robot [this message]
2025-04-11 10:36 ` [PATCH v3 6/6] PCI: cadence: Update support for TI J721e boards hans.zhang
2025-04-11 20:25   ` Rob Herring
2025-04-14  3:12     ` Manikandan Karunakaran Pillai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202504141719.svx3rf5x-lkp@intel.com \
    --to=lkp@intel.com \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=hans.zhang@cixtech.com \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=llvm@lists.linux.dev \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=mpillai@cadence.com \
    --cc=oe-kbuild-all@lists.linux.dev \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.