From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
<dan.j.williams@intel.com>, <edward.cree@amd.com>,
<davem@davemloft.net>, <kuba@kernel.org>, <pabeni@redhat.com>,
<edumazet@google.com>, <dave.jiang@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
Ben Cheatham <benjamin.cheatham@amd.com>
Subject: Re: [PATCH v13 05/22] cxl: add function for type2 cxl regs setup
Date: Tue, 15 Apr 2025 14:21:50 +0100 [thread overview]
Message-ID: <20250415142150.00000f9d@huawei.com> (raw)
In-Reply-To: <20250414151336.3852990-6-alejandro.lucero-palau@amd.com>
On Mon, 14 Apr 2025 16:13:19 +0100
alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Create a new function for a type2 device initialising
> cxl_dev_state struct regarding cxl regs setup and mapping.
>
> Export the capabilities found for checking them against the
> expected ones by the driver.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
> ---
One trivial thing inline.
> drivers/cxl/core/pci.c | 52 ++++++++++++++++++++++++++++++++++++++++++
> include/cxl/cxl.h | 4 ++++
> 2 files changed, 56 insertions(+)
>
> int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c)
> {
> int speed, bw;
> diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
> index afad8a86c2bc..729544538673 100644
> --- a/include/cxl/cxl.h
> +++ b/include/cxl/cxl.h
> @@ -231,4 +231,8 @@ struct cxl_dev_state *_cxl_dev_state_create(struct device *dev,
> struct pci_dev;
> int cxl_check_caps(struct pci_dev *pdev, unsigned long *expected,
> unsigned long *found);
> +
> +struct cxl_memdev_state;
Why have this here? only cxl_dev_state is used.
> +int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlmds,
> + unsigned long *caps);
> #endif /* __CXL_CXL_H__ */
next prev parent reply other threads:[~2025-04-15 13:21 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-14 15:13 [PATCH v13 00/22] Type2 device basic support alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 01/22] cxl: add type2 " alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 02/22] sfc: add cxl support alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 03/22] cxl: move pci generic code alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 04/22] cxl: move register/capability check to driver alejandro.lucero-palau
2025-04-14 17:18 ` Jonathan Cameron
2025-04-15 7:44 ` Alejandro Lucero Palau
2025-04-14 15:13 ` [PATCH v13 05/22] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2025-04-15 13:21 ` Jonathan Cameron [this message]
2025-04-17 12:07 ` Alejandro Lucero Palau
2025-04-14 15:13 ` [PATCH v13 06/22] sfc: make regs setup with checking and set media ready alejandro.lucero-palau
2025-04-15 13:25 ` Jonathan Cameron
2025-04-17 12:08 ` Alejandro Lucero Palau
2025-04-14 15:13 ` [PATCH v13 07/22] cxl: support dpa initialization without a mailbox alejandro.lucero-palau
2025-04-15 13:27 ` Jonathan Cameron
2025-04-14 15:13 ` [PATCH v13 08/22] sfc: initialize dpa alejandro.lucero-palau
2025-04-15 13:28 ` Jonathan Cameron
2025-04-14 15:13 ` [PATCH v13 09/22] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 10/22] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 11/22] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-04-15 13:50 ` Jonathan Cameron
2025-04-17 12:11 ` Alejandro Lucero Palau
2025-04-17 16:36 ` Jonathan Cameron
2025-04-17 21:22 ` Alejandro Lucero Palau
2025-04-22 15:51 ` Jonathan Cameron
2025-04-14 15:13 ` [PATCH v13 12/22] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 13/22] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2025-04-15 17:19 ` kernel test robot
2025-04-15 17:40 ` kernel test robot
2025-04-15 19:02 ` kernel test robot
2025-04-14 15:13 ` [PATCH v13 14/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 15/22] cxl: make region type based on endpoint type alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 16/22] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 17/22] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 18/22] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2025-04-15 13:55 ` Jonathan Cameron
2025-04-14 15:13 ` [PATCH v13 19/22] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 20/22] sfc: create cxl region alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 21/22] cxl: add function for obtaining region range alejandro.lucero-palau
2025-04-14 15:13 ` [PATCH v13 22/22] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-04-15 13:56 ` Jonathan Cameron
2025-04-14 15:20 ` [PATCH v13 00/22] Type2 device basic support Alejandro Lucero Palau
2025-04-14 21:21 ` Alison Schofield
2025-04-15 7:09 ` Alejandro Lucero Palau
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