From: Sakari Ailus <sakari.ailus@linux.intel.com>
To: linux-media@vger.kernel.org
Cc: laurent.pinchart@ideasonboard.com, dongcheng.yan@intel.com
Subject: [PATCH v2 03/11] media: ccs-pll: Check for too high VT PLL multiplier in dual PLL case
Date: Thu, 17 Apr 2025 09:53:46 +0300 [thread overview]
Message-ID: <20250417065354.311617-4-sakari.ailus@linux.intel.com> (raw)
In-Reply-To: <20250417065354.311617-1-sakari.ailus@linux.intel.com>
The check for VT PLL upper limit in dual PLL case was missing. Add it now.
Fixes: 6c7469e46b60 ("media: ccs-pll: Add trivial dual PLL support")
Cc: stable@vger.kernel.org
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
drivers/media/i2c/ccs-pll.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index 2399cd6509b7..266fcd160da6 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -312,6 +312,11 @@ __ccs_pll_calculate_vt_tree(struct device *dev,
dev_dbg(dev, "more_mul2: %u\n", more_mul);
pll_fr->pll_multiplier = mul * more_mul;
+ if (pll_fr->pll_multiplier > lim_fr->max_pll_multiplier) {
+ dev_dbg(dev, "pll multiplier %u too high\n",
+ pll_fr->pll_multiplier);
+ return -EINVAL;
+ }
if (pll_fr->pll_multiplier * pll_fr->pll_ip_clk_freq_hz >
lim_fr->max_pll_op_clk_freq_hz)
--
2.39.5
next prev parent reply other threads:[~2025-04-17 6:54 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 6:53 [PATCH v2 00/11] CCS PLL fixes and improvements Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 01/11] media: ccs-pll: Start OP pre-PLL multiplier search from correct value Sakari Ailus
2025-04-21 19:50 ` Laurent Pinchart
2025-04-22 11:43 ` Sakari Ailus
2025-04-22 11:50 ` Laurent Pinchart
2025-04-22 12:07 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 02/11] media: ccs-pll: Start VT " Sakari Ailus
2025-04-21 19:53 ` Laurent Pinchart
2025-04-17 6:53 ` Sakari Ailus [this message]
2025-04-21 19:56 ` [PATCH v2 03/11] media: ccs-pll: Check for too high VT PLL multiplier in dual PLL case Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 04/11] media: ccs-pll: Correctly the upper limit of maximum op_pre_pll_clk_div Sakari Ailus
2025-04-21 20:01 ` Laurent Pinchart
2025-04-23 11:55 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 05/11] media: ccs-pll: Print a debug message on too high VT PLL OP clock Sakari Ailus
2025-04-21 20:02 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 06/11] media: ccs-pll: Drop LINK_DECOUPLED flag Sakari Ailus
2025-04-21 20:03 ` Laurent Pinchart
2025-04-23 12:04 ` Sakari Ailus
2025-04-23 12:22 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 07/11] media: ccs-pll: Print missing PLL flags Sakari Ailus
2025-04-21 20:05 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 08/11] media: ccs-pll: Add a flag for even PLL multipliers Sakari Ailus
2025-04-21 20:19 ` Laurent Pinchart
2025-04-23 10:19 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 09/11] media: ccs-pll: Better validate VT PLL branch Sakari Ailus
2025-04-21 20:24 ` Laurent Pinchart
2025-04-23 10:26 ` Sakari Ailus
2025-04-17 6:53 ` [PATCH v2 10/11] media: ccs-pll: Print PLL calculator flags in the beginning Sakari Ailus
2025-04-21 20:25 ` Laurent Pinchart
2025-04-17 6:53 ` [PATCH v2 11/11] media: ccs-pll: Document the CCS PLL flags Sakari Ailus
2025-04-21 20:29 ` Laurent Pinchart
2025-04-22 11:49 ` Sakari Ailus
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