From: Stephen Hemminger <stephen@networkplumber.org>
To: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Cc: <dev@dpdk.org>, <rasland@nvidia.com>, <matan@nvidia.com>,
<suanmingm@nvidia.com>, <dsosnowski@nvidia.com>
Subject: Re: [PATCH] net/mlx5: mitigate the Tx queue parameter adjustment
Date: Wed, 23 Apr 2025 08:24:50 -0700 [thread overview]
Message-ID: <20250423082450.5eb6cdee@hermes.local> (raw)
In-Reply-To: <20250423122807.121990-1-viacheslavo@nvidia.com>
On Wed, 23 Apr 2025 15:28:07 +0300
Viacheslav Ovsiienko <viacheslavo@nvidia.com> wrote:
> + DRV_LOG(WARNING,
> + "tso header inline requirements (%u) are not satisfied (%u) on port %u,"
> + " the Tx queue capacity (%d) may not be guaranteed",
> + MLX5_MAX_TSO_HEADER, max_inline, priv->dev_data->port_id, desc);
If your messages are so long they can't fit on a single line, then they are too wordy.
Please be more terse.
prev parent reply other threads:[~2025-04-23 15:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 12:28 [PATCH] net/mlx5: mitigate the Tx queue parameter adjustment Viacheslav Ovsiienko
2025-04-23 15:24 ` Stephen Hemminger [this message]
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