From: kernel test robot <lkp@intel.com>
To: Claudiu <claudiu.beznea@tuxon.dev>,
bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org,
saravanak@google.com, p.zabel@pengutronix.de
Cc: oe-kbuild-all@lists.linux.dev, claudiu.beznea@tuxon.dev,
linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 1/8] soc: renesas: r9a08g045-sysc: Add max reg offset
Date: Thu, 1 May 2025 17:26:46 +0800 [thread overview]
Message-ID: <202505011714.p63Hj7Fe-lkp@intel.com> (raw)
In-Reply-To: <20250430103236.3511989-2-claudiu.beznea.uj@bp.renesas.com>
Hi Claudiu,
kernel test robot noticed the following build warnings:
[auto build test WARNING on pci/next]
[also build test WARNING on pci/for-linus geert-renesas-devel/next geert-renesas-drivers/renesas-clk robh/for-next arm64/for-next/core linus/master v6.15-rc4 next-20250430]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Claudiu/soc-renesas-r9a08g045-sysc-Add-max-reg-offset/20250430-183951
base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next
patch link: https://lore.kernel.org/r/20250430103236.3511989-2-claudiu.beznea.uj%40bp.renesas.com
patch subject: [PATCH 1/8] soc: renesas: r9a08g045-sysc: Add max reg offset
config: arm64-randconfig-001-20250501 (https://download.01.org/0day-ci/archive/20250501/202505011714.p63Hj7Fe-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 9.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250501/202505011714.p63Hj7Fe-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505011714.p63Hj7Fe-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/soc/renesas/r9a08g045-sysc.c:23:3: error: 'const struct rz_sysc_init_data' has no member named 'max_register_offset'
23 | .max_register_offset = 0xe28,
| ^~~~~~~~~~~~~~~~~~~
>> drivers/soc/renesas/r9a08g045-sysc.c:23:25: warning: excess elements in struct initializer
23 | .max_register_offset = 0xe28,
| ^~~~~
drivers/soc/renesas/r9a08g045-sysc.c:23:25: note: (near initialization for 'rzg3s_sysc_init_data')
vim +23 drivers/soc/renesas/r9a08g045-sysc.c
20
21 const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst = {
22 .soc_id_init_data = &rzg3s_sysc_soc_id_init_data,
> 23 .max_register_offset = 0xe28,
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-05-01 9:29 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 10:32 [PATCH 0/8] PCI: rzg3s-host: Add PCIe driver for Renesas RZ/G3S SoC Claudiu
2025-04-30 10:32 ` [PATCH 1/8] soc: renesas: r9a08g045-sysc: Add max reg offset Claudiu
2025-05-01 9:26 ` kernel test robot [this message]
2025-05-01 10:32 ` kernel test robot
2025-05-01 16:12 ` kernel test robot
2025-04-30 10:32 ` [PATCH 2/8] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the PCIe Claudiu
2025-04-30 10:32 ` [PATCH 3/8] of/irq: Export of_irq_count() Claudiu
2025-05-09 19:36 ` Rob Herring
2025-04-30 10:32 ` [PATCH 4/8] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Add documentation for the PCIe IP on Renesas RZ/G3S Claudiu
2025-05-01 20:16 ` Bjorn Helgaas
2025-05-05 11:28 ` Claudiu Beznea
2025-05-09 21:08 ` Rob Herring
2025-05-14 11:41 ` Claudiu Beznea
2025-04-30 10:32 ` [PATCH 5/8] PCI: rzg3s-host: Add Initial PCIe Host Driver for Renesas RZ/G3S SoC Claudiu
2025-05-01 20:12 ` Bjorn Helgaas
2025-05-05 11:26 ` Claudiu Beznea
2025-05-09 10:29 ` Claudiu Beznea
2025-05-12 20:38 ` Bjorn Helgaas
2025-05-14 10:29 ` Claudiu Beznea
2025-05-12 20:25 ` Bjorn Helgaas
2025-05-14 9:37 ` Claudiu Beznea
2025-05-09 10:51 ` Philipp Zabel
2025-05-09 11:41 ` Claudiu Beznea
2025-05-09 20:49 ` Rob Herring
2025-05-14 11:39 ` Claudiu Beznea
2025-04-30 10:32 ` [PATCH 6/8] arm64: dts: renesas: r9a08g045s33: Add PCIe node Claudiu
2025-04-30 10:32 ` [PATCH 7/8] arm64: dts: renesas: rzg3s-smarc: Enable PCIe Claudiu
2025-04-30 10:32 ` [PATCH 8/8] arm64: defconfig: Enable PCIe for the Renesas RZ/G3S SoC Claudiu
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