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From: Tianyu Lan <ltykernel@gmail.com>
To: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org,
	decui@microsoft.com, tglx@linutronix.de, mingo@redhat.com,
	bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
	hpa@zytor.com, Neeraj.Upadhyay@amd.com, yuehaibing@huawei.com,
	kvijayab@amd.com, jacob.jun.pan@linux.intel.com,
	jpoimboe@kernel.org, tiala@microsoft.com
Cc: linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [RFC PATCH 2/6] x86/x2apic-savic: Expose x2apic_savic_update_vector()
Date: Tue,  6 May 2025 09:07:07 -0400	[thread overview]
Message-ID: <20250506130712.156583-3-ltykernel@gmail.com> (raw)
In-Reply-To: <20250506130712.156583-1-ltykernel@gmail.com>

From: Tianyu Lan <tiala@microsoft.com>

Expose x2apic_savic_update_vector() and device driver
arch code may update AVIC backing page to allow Hyper-V
inject associated vector.

Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/include/asm/apic.h         | 9 +++++++++
 arch/x86/kernel/apic/x2apic_savic.c | 8 ++++++++
 2 files changed, 17 insertions(+)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 6aa4b8ff08a9..949389e05dd7 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -241,6 +241,15 @@ static inline u64 native_x2apic_icr_read(void)
 	return val;
 }
 
+#if defined(CONFIG_AMD_SECURE_AVIC)
+extern void x2apic_savic_update_vector(unsigned int cpu,
+				unsigned int vector,
+				bool set);
+#else
+static inline void x2apic_savic_update_vector(unsigned int cpu,
+					      unsigned int vector,								      bool set) { }
+#endif
+
 extern int x2apic_mode;
 extern int x2apic_phys;
 extern void __init x2apic_set_max_apicid(u32 apicid);
diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
index 6284d1f8dac9..0dd7e39931b0 100644
--- a/arch/x86/kernel/apic/x2apic_savic.c
+++ b/arch/x86/kernel/apic/x2apic_savic.c
@@ -321,6 +321,14 @@ static void savic_update_vector(unsigned int cpu, unsigned int vector, bool set)
 	update_vector(cpu, SAVIC_ALLOWED_IRR, vector, set);
 }
 
+void x2apic_savic_update_vector(unsigned int cpu, unsigned int vector, bool set)
+{
+	if (!cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		return;
+
+	savic_update_vector(cpu, vector, set);
+}
+
 static void init_apic_page(void)
 {
 	u32 apic_id;
-- 
2.25.1


  parent reply	other threads:[~2025-05-06 13:07 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06 13:07 [RFC PATCH 0/6] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
2025-05-06 13:07 ` [RFC PATCH 1/6] x86/Hyper-V: Not use hv apic driver when Secure AVIC is available Tianyu Lan
2025-05-14 16:54   ` Michael Kelley
2025-05-15 12:56     ` Tianyu Lan
2025-05-06 13:07 ` Tianyu Lan [this message]
2025-05-07  3:56   ` [RFC PATCH 2/6] x86/x2apic-savic: Expose x2apic_savic_update_vector() Neeraj Upadhyay
2025-05-07 16:15     ` Tianyu Lan
2025-05-06 13:07 ` [RFC PATCH 3/6] drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
2025-05-06 13:07 ` [RFC PATCH 4/6] x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectors Tianyu Lan
2025-05-14 16:54   ` Michael Kelley
2025-05-16 15:39     ` Tianyu Lan
2025-05-06 13:07 ` [RFC PATCH 5/6] x86/Hyper-V: Not use auto-eoi when Secure AVIC is available Tianyu Lan
2025-05-14 16:54   ` Michael Kelley
2025-05-16 15:53     ` Tianyu Lan
2025-05-06 13:07 ` [RFC PATCH 6/6] x86/x2apic-savic: Not set APIC backing page if Secure AVIC is not enabled Tianyu Lan
2025-05-07  4:03   ` Neeraj Upadhyay
2025-05-16 15:58     ` Tianyu Lan
2025-05-14 16:54 ` [RFC PATCH 0/6] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Michael Kelley
2025-05-15 12:51   ` Tianyu Lan

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