From: Conor Dooley <conor@kernel.org>
To: Paresh Bhagat <p-bhagat@ti.com>
Cc: nm@ti.com, vigneshr@ti.com, praneeth@ti.com, kristo@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, khasim@ti.com, v-singh1@ti.com,
afd@ti.com
Subject: Re: [PATCH v3 1/3] dt-bindings: arm: ti: Add bindings for AM62D2 SoC
Date: Thu, 8 May 2025 15:48:28 +0100 [thread overview]
Message-ID: <20250508-sufferer-evolution-e8f9c36fc911@spud> (raw)
In-Reply-To: <20250508091422.288876-2-p-bhagat@ti.com>
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On Thu, May 08, 2025 at 02:44:20PM +0530, Paresh Bhagat wrote:
> The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core
> targeted for applications needing high-performance Digital Signal
> Processing. It is used in applications like automotive audio systems,
> professional sound equipment, radar and radio for aerospace, sonar in
> marine devices, and ultrasound in medical imaging. It also supports
> precise signal analysis in test and measurement tools.
>
> Some highlights of AM62D2 SoC are:
>
> * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single
> core variants are provided in the same package to allow HW compatible
> designs.
> * One Device manager Cortex-R5F for system power and resource management,
> and one Cortex-R5F for Functional Safety or general-purpose usage.
> * DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on
> single core C7x.
> * 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins
> which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S
> and TDM Audio inputs and outputs.
> * Integrated Giga-bit Ethernet switch supporting up to a total of two
> external ports with TSN capable to enable audio networking features such
> as, Ethernet Audio Video Bridging (eAVB) and Dante.
> * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory
> controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other
> peripherals.
> * Dedicated Centralized Hardware Security Module with support for secure
> boot, debug security and crypto acceleration and trusted execution
> environment.
> * One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
> * Low power mode support: Partial IO support for CAN/GPIO/UART wakeup.
>
> This SoC is part K3 AM62x family, which includes the AM62A and AM62P
> variants. While the AM62A and AM62D are largely similar, the AM62D is
> specifically targeted for general-purpose DSP applications, whereas the
> AM62A focuses on edge AI workloads. A key distinction is that the AM62D
> does not include multimedia components such as the video encoder/decoder,
> MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal
> processing, or the display subsystem. Additionally, the AM62D has a
> different pin configuration compared to the AM62A, which impacts embedded
> software development.
>
> This adds dt bindings for TI's AM62D2 family of devices.
>
> More details about the SoCs can be found in the Technical Reference Manual:
> https://www.ti.com/lit/pdf/sprujd4
>
> Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
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next prev parent reply other threads:[~2025-05-08 15:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-08 9:14 [PATCH v3 0/3] Add support for AM62D2 SoC and EVM Paresh Bhagat
2025-05-08 9:14 ` [PATCH v3 1/3] dt-bindings: arm: ti: Add bindings for AM62D2 SoC Paresh Bhagat
2025-05-08 10:10 ` Rob Herring (Arm)
2025-05-08 14:48 ` Conor Dooley [this message]
2025-05-08 9:14 ` [PATCH v3 2/3] arm64: dts: ti: Add pinctrl entries for AM62D2 family of SoCs Paresh Bhagat
2025-05-08 9:14 ` [PATCH v3 3/3] arm64: dts: ti: Add support for AM62D2-EVM Paresh Bhagat
2025-05-09 0:22 ` Bryan Brattlof
2025-05-09 2:16 ` Nishanth Menon
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