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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fQdXx3HTsPNm2JgJIQeGrl1G1KZnmDGgfP+bzS4sBUg=; b=IF/vify+7pmic5h77JH6xo0lJEU3DsZTQmhM0SHZfVbNaIDgSzZwqga7CScs+g/In2lU4Xscq+0/6WPD6mlFhT+BIvjIXec0tcHdLxIie6GdpwRzHSlIaqnWY531g54/QOanOcsAuNTQJGWykZT9LU9VdasTmWPwbDomMjHZFD0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Jiqian Chen To: CC: Huang Rui , Jiqian Chen , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 03/10] vpci/header: Emulate extended capability list for dom0 Date: Fri, 9 May 2025 17:05:35 +0800 Message-ID: <20250509090542.2199676-4-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250509090542.2199676-1-Jiqian.Chen@amd.com> References: <20250509090542.2199676-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 May 2025 09:06:04.8336 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74841d00-2f72-4a1a-20ba-08dd8ed8ba83 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8814 Add a new function to emulate extended capability list for dom0, and call it in init_header(). So that it will be easy to hide a extended capability whose initialization fails. As for the extended capability list of domU, just move the logic into above function and keep hiding it for domU. Signed-off-by: Jiqian Chen --- cc: "Roger Pau Monné" --- v3->v4 changes: * Add check "if ( !header ) return 0;" to avoid adding handler for device that has no extended capabilities. v2->v3 changes: * In vpci_init_ext_capability_list(), when domain is domU, directly return after adding a handler(hiding all extended capability for domU). * In vpci_init_ext_capability_list(), change condition to be "while ( pos >= 0x100U && ttl-- )" instead of "while ( pos && ttl-- )". * Add new function vpci_hw_write32, and pass it to extended capability handler for dom0. v1->v2 changes: new patch Best regards, Jiqian Chen. --- xen/drivers/vpci/header.c | 39 +++++++++++++++++++++++++++++++-------- xen/drivers/vpci/vpci.c | 6 ++++++ xen/include/xen/vpci.h | 2 ++ 3 files changed, 39 insertions(+), 8 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index a06c518c506c..2915c801adeb 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -827,6 +827,34 @@ static int vpci_init_capability_list(struct pci_dev *pdev) PCI_STATUS_RSVDZ_MASK); } +static int vpci_init_ext_capability_list(struct pci_dev *pdev) +{ + unsigned int pos = PCI_CFG_SPACE_SIZE, ttl = 480; + + if ( !is_hardware_domain(pdev->domain) ) + /* Extended capabilities read as zero, write ignore for guest */ + return vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, 4, (void *)0); + + while ( pos >= PCI_CFG_SPACE_SIZE && ttl-- ) + { + uint32_t header = pci_conf_read32(pdev->sbdf, pos); + int rc; + + if ( !header ) + return 0; + + rc = vpci_add_register(pdev->vpci, vpci_read_val, vpci_hw_write32, + pos, 4, (void *)(uintptr_t)header); + if ( rc ) + return rc; + + pos = PCI_EXT_CAP_NEXT(header); + } + + return 0; +} + static int cf_check init_header(struct pci_dev *pdev) { uint16_t cmd; @@ -879,14 +907,9 @@ static int cf_check init_header(struct pci_dev *pdev) if ( rc ) return rc; - if ( !is_hwdom ) - { - /* Extended capabilities read as zero, write ignore */ - rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, 0x100, 4, - (void *)0); - if ( rc ) - return rc; - } + rc = vpci_init_ext_capability_list(pdev); + if ( rc ) + return rc; if ( pdev->ignore_bars ) return 0; diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index cf3326a966d0..2022b61ea7b6 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -238,6 +238,12 @@ void cf_check vpci_hw_write16( pci_conf_write16(pdev->sbdf, reg, val); } +void cf_check vpci_hw_write32( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data) +{ + pci_conf_write32(pdev->sbdf, reg, val); +} + int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler, vpci_write_t *write_handler, unsigned int offset, unsigned int size, void *data, uint32_t ro_mask, diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index fc8d5b470b0b..61d16cc8b897 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -80,6 +80,8 @@ void cf_check vpci_hw_write8( const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); void cf_check vpci_hw_write16( const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); +void cf_check vpci_hw_write32( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); /* * Check for pending vPCI operations on this vcpu. Returns true if the vcpu -- 2.34.1