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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Jason Chien <jason.chien@sifive.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	Peter Maydell <peter.maydell@linaro.org>,
	Andrey Smirnov <andrew.smirnov@gmail.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	"open list:MCIMX7D SABRE / i..." <qemu-arm@nongnu.org>
Subject: Re: [PATCH 0/4] Integrate IOMMUs with PCI hosts that have ATUs
Date: Sun, 11 May 2025 09:49:31 -0400	[thread overview]
Message-ID: <20250511094907-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20250307203952.13871-1-jason.chien@sifive.com>

On Sat, Mar 08, 2025 at 04:39:33AM +0800, Jason Chien wrote:
> The struct PCIIOMMUOps is designed for use by an IOMMU, but many PCI hosts
> also utilize it to implement their ATUs, preventing coexistence with IOMMUs.
> Overwriting a PCI host’s PCIIOMMUOps disrupts its translation rules.
> 
> This patch series introduces a mechanism to route inbound transactions from
> PCI hosts to the IOMMU, enabling proper integration.
> 
> The final patch depends on another patch series:
> https://lists.nongnu.org/archive/html/qemu-riscv/2025-03/msg00003.html


PCI things:

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>


given the dependency, pls merge through risc-v tree.

> Jason Chien (4):
>   include/hw/pci: Introduce a callback to set the downstream mr of PCI
>     hosts
>   hw/pci: Introduce an API to set PCI host downstream mr for IOMMU
>     integration
>   hw/pci-host/designware: Implement PCIIOMMUOps.set_downstream_mr()
>   hw/riscv/riscv-iommu: Connect the IOMMU with PCI hosts that have ATUs
> 
>  hw/pci-host/designware.c         | 18 +++++++++++++++---
>  hw/pci/pci.c                     |  8 ++++++++
>  hw/riscv/riscv-iommu.c           | 15 ++++++++++-----
>  include/hw/pci-host/designware.h |  2 ++
>  include/hw/pci/pci.h             | 21 +++++++++++++++++++++
>  5 files changed, 56 insertions(+), 8 deletions(-)
> 
> -- 
> 2.43.2



      parent reply	other threads:[~2025-05-11 13:50 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-07 20:39 [PATCH 0/4] Integrate IOMMUs with PCI hosts that have ATUs Jason Chien
2025-03-07 20:39 ` [PATCH 1/4] include/hw/pci: Introduce a callback to set the downstream mr of PCI hosts Jason Chien
2025-03-07 20:39 ` [PATCH 2/4] hw/pci: Introduce an API to set PCI host downstream mr for IOMMU integration Jason Chien
2025-03-07 20:39 ` [PATCH 3/4] hw/pci-host/designware: Implement PCIIOMMUOps.set_downstream_mr() Jason Chien
2025-03-07 20:39 ` [PATCH 4/4] hw/riscv/riscv-iommu: Connect the IOMMU with PCI hosts that have ATUs Jason Chien
2025-03-13 12:44   ` Daniel Henrique Barboza
2025-03-19 17:19 ` [PATCH 0/4] Integrate IOMMUs " Jason Chien
2025-03-19 17:42   ` Michael S. Tsirkin
2025-05-11 13:49 ` Michael S. Tsirkin [this message]

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