From: kernel test robot <lkp@intel.com>
To: oe-kbuild@lists.linux.dev
Cc: lkp@intel.com, Dan Carpenter <error27@gmail.com>
Subject: [linux-next:master 6048/10031] drivers/mtd/nand/raw/loongson1-nand-controller.c:374 ls1x_nand_dma_transfer() warn: passing zero to 'PTR_ERR'
Date: Sun, 11 May 2025 11:53:06 +0800 [thread overview]
Message-ID: <202505111115.FfRZilcq-lkp@intel.com> (raw)
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
TO: Keguang Zhang <keguang.zhang@gmail.com>
CC: Miquel Raynal <miquel.raynal@bootlin.com>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: ed61cb3d78d585209ec775933078e268544fe9a4
commit: d2d10ede04b1671dc4762479a2d06f183aaafbba [6048/10031] mtd: rawnand: Add Loongson-1 NAND Controller Driver
:::::: branch date: 2 days ago
:::::: commit date: 13 days ago
config: microblaze-randconfig-r072-20250511 (https://download.01.org/0day-ci/archive/20250511/202505111115.FfRZilcq-lkp@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 14.2.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202505111115.FfRZilcq-lkp@intel.com/
smatch warnings:
drivers/mtd/nand/raw/loongson1-nand-controller.c:374 ls1x_nand_dma_transfer() warn: passing zero to 'PTR_ERR'
vim +/PTR_ERR +374 drivers/mtd/nand/raw/loongson1-nand-controller.c
d2d10ede04b1671 Keguang Zhang 2025-03-20 341
d2d10ede04b1671 Keguang Zhang 2025-03-20 342 static int ls1x_nand_dma_transfer(struct ls1x_nand_host *host, struct ls1x_nand_op *op)
d2d10ede04b1671 Keguang Zhang 2025-03-20 343 {
d2d10ede04b1671 Keguang Zhang 2025-03-20 344 struct nand_chip *chip = &host->chip;
d2d10ede04b1671 Keguang Zhang 2025-03-20 345 struct dma_chan *chan = host->dma_chan;
d2d10ede04b1671 Keguang Zhang 2025-03-20 346 struct device *dev = chan->device->dev;
d2d10ede04b1671 Keguang Zhang 2025-03-20 347 struct dma_async_tx_descriptor *desc;
d2d10ede04b1671 Keguang Zhang 2025-03-20 348 enum dma_data_direction data_dir = op->is_write ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
d2d10ede04b1671 Keguang Zhang 2025-03-20 349 enum dma_transfer_direction xfer_dir = op->is_write ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
d2d10ede04b1671 Keguang Zhang 2025-03-20 350 void *buf = op->buf;
d2d10ede04b1671 Keguang Zhang 2025-03-20 351 char *dma_buf = NULL;
d2d10ede04b1671 Keguang Zhang 2025-03-20 352 dma_addr_t dma_addr;
d2d10ede04b1671 Keguang Zhang 2025-03-20 353 int ret;
d2d10ede04b1671 Keguang Zhang 2025-03-20 354
d2d10ede04b1671 Keguang Zhang 2025-03-20 355 if (IS_ALIGNED((uintptr_t)buf, chip->buf_align) &&
d2d10ede04b1671 Keguang Zhang 2025-03-20 356 IS_ALIGNED(op->orig_len, chip->buf_align)) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 357 dma_addr = dma_map_single(dev, buf, op->orig_len, data_dir);
d2d10ede04b1671 Keguang Zhang 2025-03-20 358 if (dma_mapping_error(dev, dma_addr)) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 359 dev_err(dev, "failed to map DMA buffer\n");
d2d10ede04b1671 Keguang Zhang 2025-03-20 360 return -ENXIO;
d2d10ede04b1671 Keguang Zhang 2025-03-20 361 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 362 } else if (!op->is_write) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 363 dma_buf = dma_alloc_coherent(dev, op->len, &dma_addr, GFP_KERNEL);
d2d10ede04b1671 Keguang Zhang 2025-03-20 364 if (!dma_buf)
d2d10ede04b1671 Keguang Zhang 2025-03-20 365 return -ENOMEM;
d2d10ede04b1671 Keguang Zhang 2025-03-20 366 } else {
d2d10ede04b1671 Keguang Zhang 2025-03-20 367 dev_err(dev, "subpage writing not supported\n");
d2d10ede04b1671 Keguang Zhang 2025-03-20 368 return -EOPNOTSUPP;
d2d10ede04b1671 Keguang Zhang 2025-03-20 369 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 370
d2d10ede04b1671 Keguang Zhang 2025-03-20 371 desc = dmaengine_prep_slave_single(chan, dma_addr, op->len, xfer_dir, DMA_PREP_INTERRUPT);
d2d10ede04b1671 Keguang Zhang 2025-03-20 372 if (!desc) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 373 dev_err(dev, "failed to prepare DMA descriptor\n");
d2d10ede04b1671 Keguang Zhang 2025-03-20 @374 ret = PTR_ERR(desc);
d2d10ede04b1671 Keguang Zhang 2025-03-20 375 goto err;
d2d10ede04b1671 Keguang Zhang 2025-03-20 376 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 377 desc->callback = ls1x_nand_dma_callback;
d2d10ede04b1671 Keguang Zhang 2025-03-20 378 desc->callback_param = host;
d2d10ede04b1671 Keguang Zhang 2025-03-20 379
d2d10ede04b1671 Keguang Zhang 2025-03-20 380 host->dma_cookie = dmaengine_submit(desc);
d2d10ede04b1671 Keguang Zhang 2025-03-20 381 ret = dma_submit_error(host->dma_cookie);
d2d10ede04b1671 Keguang Zhang 2025-03-20 382 if (ret) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 383 dev_err(dev, "failed to submit DMA descriptor\n");
d2d10ede04b1671 Keguang Zhang 2025-03-20 384 goto err;
d2d10ede04b1671 Keguang Zhang 2025-03-20 385 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 386
d2d10ede04b1671 Keguang Zhang 2025-03-20 387 dev_dbg(dev, "issue DMA with cookie=%d\n", host->dma_cookie);
d2d10ede04b1671 Keguang Zhang 2025-03-20 388 dma_async_issue_pending(chan);
d2d10ede04b1671 Keguang Zhang 2025-03-20 389
d2d10ede04b1671 Keguang Zhang 2025-03-20 390 if (!wait_for_completion_timeout(&host->dma_complete, msecs_to_jiffies(1000))) {
d2d10ede04b1671 Keguang Zhang 2025-03-20 391 dmaengine_terminate_sync(chan);
d2d10ede04b1671 Keguang Zhang 2025-03-20 392 reinit_completion(&host->dma_complete);
d2d10ede04b1671 Keguang Zhang 2025-03-20 393 ret = -ETIMEDOUT;
d2d10ede04b1671 Keguang Zhang 2025-03-20 394 goto err;
d2d10ede04b1671 Keguang Zhang 2025-03-20 395 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 396
d2d10ede04b1671 Keguang Zhang 2025-03-20 397 if (dma_buf)
d2d10ede04b1671 Keguang Zhang 2025-03-20 398 memcpy(buf, dma_buf + op->aligned_offset, op->orig_len);
d2d10ede04b1671 Keguang Zhang 2025-03-20 399 err:
d2d10ede04b1671 Keguang Zhang 2025-03-20 400 if (dma_buf)
d2d10ede04b1671 Keguang Zhang 2025-03-20 401 dma_free_coherent(dev, op->len, dma_buf, dma_addr);
d2d10ede04b1671 Keguang Zhang 2025-03-20 402 else
d2d10ede04b1671 Keguang Zhang 2025-03-20 403 dma_unmap_single(dev, dma_addr, op->orig_len, data_dir);
d2d10ede04b1671 Keguang Zhang 2025-03-20 404
d2d10ede04b1671 Keguang Zhang 2025-03-20 405 return ret;
d2d10ede04b1671 Keguang Zhang 2025-03-20 406 }
d2d10ede04b1671 Keguang Zhang 2025-03-20 407
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next reply other threads:[~2025-05-11 3:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-11 3:53 kernel test robot [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-05-13 14:42 [linux-next:master 6048/10031] drivers/mtd/nand/raw/loongson1-nand-controller.c:374 ls1x_nand_dma_transfer() warn: passing zero to 'PTR_ERR' Dan Carpenter
2025-05-16 15:00 ` Miquel Raynal
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