Re: [PATCH v2 1/2] hw/i386/amd_iommu: Fix device setup failure when PT is on.

["Michael S. Tsirkin" <mst@redhat.com>]

On Mon, May 12, 2025 at 09:35:37AM +0530, Sairaj Kodilkar wrote:
> Current amd_iommu enables the iommu_nodma address space when pt_supported

Currently,

> flag is on. This causes device to bypass the IOMMU and use untranslated

devices

> address to perform DMA when guest kernel uses DMA mode, resulting in

the guest

> failure to setup the devices in the guest.

a failure

> 
> Fix the issue by always enabling amdvi_dev_as->iommu, which is explicitly
> created as an IOMMU memory region (i.e. a memory region with mr->is_iommu
> == true), and it is meant to support DMA remapping. It is relying on the
> "side effect" that VFIO will try to register notifiers for memory regions
> that are an "IOMMU" (i.e. pass the check in memory_region_is_iommu()),
> and later fail when trying to register the notifier.

what will fail? what is meant for what? confused.

> 
> Fixes: c1f46999ef506 ("amd_iommu: Add support for pass though mode")

explain the connection with this commit pls. did it work
prior to that?

> Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
> ---
>  hw/i386/amd_iommu.c | 12 ++----------
>  1 file changed, 2 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 5f9b95279997..df8ba5d39ada 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -1426,7 +1426,6 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
>      AMDVIState *s = opaque;
>      AMDVIAddressSpace **iommu_as, *amdvi_dev_as;
>      int bus_num = pci_bus_num(bus);
> -    X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
>  
>      iommu_as = s->address_spaces[bus_num];
>  
> @@ -1486,15 +1485,8 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
>                                              AMDVI_INT_ADDR_FIRST,
>                                              &amdvi_dev_as->iommu_ir, 1);
>  
> -        if (!x86_iommu->pt_supported) {
> -            memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, false);
> -            memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu),
> -                                      true);
> -        } else {
> -            memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu),
> -                                      false);
> -            memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, true);
> -        }
> +        memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, false);
> +        memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu), true);
>      }
>      return &iommu_as[devfn]->as;
>  }
> -- 
> 2.34.1