Re: [PATCH] RDMA/irdma: puda: Clear entries after allocation to ensure clean state

[kernel test robot <lkp@intel.com>]

Hi Wentao,

kernel test robot noticed the following build errors:

[auto build test ERROR on rdma/for-next]
[also build test ERROR on linus/master v6.15-rc6 next-20250516]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Wentao-Liang/RDMA-irdma-puda-Clear-entries-after-allocation-to-ensure-clean-state/20250515-214046
base:   https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git for-next
patch link:    https://lore.kernel.org/r/20250515133929.1222-1-vulab%40iscas.ac.cn
patch subject: [PATCH] RDMA/irdma: puda: Clear entries after allocation to ensure clean state
config: sparc-allmodconfig (https://download.01.org/0day-ci/archive/20250516/202505162002.CUpcFouJ-lkp@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250516/202505162002.CUpcFouJ-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505162002.CUpcFouJ-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/infiniband/hw/irdma/puda.c: In function 'irdma_puda_send':
>> drivers/infiniband/hw/irdma/puda.c:448:24: error: passing argument 1 of 'irdma_clr_wqes' from incompatible pointer type [-Wincompatible-pointer-types]
     448 |         irdma_clr_wqes(qp, wqe_idx);
         |                        ^~
         |                        |
         |                        struct irdma_sc_qp *
   In file included from drivers/infiniband/hw/irdma/type.h:7,
                    from drivers/infiniband/hw/irdma/puda.c:6:
   drivers/infiniband/hw/irdma/user.h:412:41: note: expected 'struct irdma_qp_uk *' but argument is of type 'struct irdma_sc_qp *'
     412 | void irdma_clr_wqes(struct irdma_qp_uk *qp, u32 qp_wqe_idx);
         |                     ~~~~~~~~~~~~~~~~~~~~^~


vim +/irdma_clr_wqes +448 drivers/infiniband/hw/irdma/puda.c

   420	
   421	/**
   422	 * irdma_puda_send - complete send wqe for transmit
   423	 * @qp: puda qp for send
   424	 * @info: buffer information for transmit
   425	 */
   426	int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info)
   427	{
   428		__le64 *wqe;
   429		u32 iplen, l4len;
   430		u64 hdr[2];
   431		u32 wqe_idx;
   432		u8 iipt;
   433	
   434		/* number of 32 bits DWORDS in header */
   435		l4len = info->tcplen >> 2;
   436		if (info->ipv4) {
   437			iipt = 3;
   438			iplen = 5;
   439		} else {
   440			iipt = 1;
   441			iplen = 10;
   442		}
   443	
   444		wqe = irdma_puda_get_next_send_wqe(&qp->qp_uk, &wqe_idx);
   445		if (!wqe)
   446			return -ENOMEM;
   447	
 > 448		irdma_clr_wqes(qp, wqe_idx);
   449	
   450		qp->qp_uk.sq_wrtrk_array[wqe_idx].wrid = (uintptr_t)info->scratch;
   451		/* Third line of WQE descriptor */
   452		/* maclen is in words */
   453	
   454		if (qp->dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
   455			hdr[0] = 0; /* Dest_QPN and Dest_QKey only for UD */
   456			hdr[1] = FIELD_PREP(IRDMA_UDA_QPSQ_OPCODE, IRDMA_OP_TYPE_SEND) |
   457				 FIELD_PREP(IRDMA_UDA_QPSQ_L4LEN, l4len) |
   458				 FIELD_PREP(IRDMAQPSQ_AHID, info->ah_id) |
   459				 FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) |
   460				 FIELD_PREP(IRDMA_UDA_QPSQ_VALID,
   461					    qp->qp_uk.swqe_polarity);
   462	
   463			/* Forth line of WQE descriptor */
   464	
   465			set_64bit_val(wqe, 0, info->paddr);
   466			set_64bit_val(wqe, 8,
   467				      FIELD_PREP(IRDMAQPSQ_FRAG_LEN, info->len) |
   468				      FIELD_PREP(IRDMA_UDA_QPSQ_VALID, qp->qp_uk.swqe_polarity));
   469		} else {
   470			hdr[0] = FIELD_PREP(IRDMA_UDA_QPSQ_MACLEN, info->maclen >> 1) |
   471				 FIELD_PREP(IRDMA_UDA_QPSQ_IPLEN, iplen) |
   472				 FIELD_PREP(IRDMA_UDA_QPSQ_L4T, 1) |
   473				 FIELD_PREP(IRDMA_UDA_QPSQ_IIPT, iipt) |
   474				 FIELD_PREP(IRDMA_GEN1_UDA_QPSQ_L4LEN, l4len);
   475	
   476			hdr[1] = FIELD_PREP(IRDMA_UDA_QPSQ_OPCODE, IRDMA_OP_TYPE_SEND) |
   477				 FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) |
   478				 FIELD_PREP(IRDMA_UDA_QPSQ_DOLOOPBACK, info->do_lpb) |
   479				 FIELD_PREP(IRDMA_UDA_QPSQ_VALID, qp->qp_uk.swqe_polarity);
   480	
   481			/* Forth line of WQE descriptor */
   482	
   483			set_64bit_val(wqe, 0, info->paddr);
   484			set_64bit_val(wqe, 8,
   485				      FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_LEN, info->len));
   486		}
   487	
   488		set_64bit_val(wqe, 16, hdr[0]);
   489		dma_wmb(); /* make sure WQE is written before valid bit is set */
   490	
   491		set_64bit_val(wqe, 24, hdr[1]);
   492	
   493		print_hex_dump_debug("PUDA: PUDA SEND WQE", DUMP_PREFIX_OFFSET, 16, 8,
   494				     wqe, 32, false);
   495		irdma_uk_qp_post_wr(&qp->qp_uk);
   496		return 0;
   497	}
   498	

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