From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Sasha Levin <sashal@kernel.org>
Subject: Re: [PATCH 5.15 v3 02/16] x86/speculation: Simplify and make CALL_NOSPEC consistent
Date: Sat, 17 May 2025 09:08:03 -0400 [thread overview]
Message-ID: <20250516212425-49b09642bb00be4a@stable.kernel.org> (raw)
In-Reply-To: <20250516-its-5-15-v3-2-16fcdaaea544@linux.intel.com>
[ Sasha's backport helper bot ]
Hi,
✅ All tests passed successfully. No issues detected.
No action required from the submitter.
The upstream commit SHA1 provided is correct: cfceff8526a426948b53445c02bcb98453c7330d
Status in newer kernel trees:
6.14.y | Present (different SHA1: 010c4a461c1d)
6.12.y | Present (different SHA1: ca16a0acacd7)
6.6.y | Present (different SHA1: ffe12f8aa62c)
6.1.y | Present (different SHA1: 7f6da764325a)
Note: The patch differs from the upstream commit:
---
1: cfceff8526a42 ! 1: cf7360bfe0353 x86/speculation: Simplify and make CALL_NOSPEC consistent
@@ Metadata
## Commit message ##
x86/speculation: Simplify and make CALL_NOSPEC consistent
+ commit cfceff8526a426948b53445c02bcb98453c7330d upstream.
+
CALL_NOSPEC macro is used to generate Spectre-v2 mitigation friendly
indirect branches. At compile time the macro defaults to indirect branch,
and at runtime those can be patched to thunk based mitigations.
@@ Commit message
calls.
Make CALL_NOSPEC consistent with the rest of the kernel, default to
- retpoline thunk at compile time when CONFIG_MITIGATION_RETPOLINE is
+ retpoline thunk at compile time when CONFIG_RETPOLINE is
enabled.
+ [ pawan: s/CONFIG_MITIGATION_RETPOLINE/CONFIG_RETPOLINE/ ]
+
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com
@@ Commit message
Link: https://lore.kernel.org/r/20250228-call-nospec-v3-1-96599fed0f33@linux.intel.com
## arch/x86/include/asm/nospec-branch.h ##
-@@ arch/x86/include/asm/nospec-branch.h: static inline void call_depth_return_thunk(void) {}
+@@ arch/x86/include/asm/nospec-branch.h: extern retpoline_thunk_t __x86_indirect_thunk_array[];
* Inline asm uses the %V modifier which is only in newer GCC
- * which is ensured when CONFIG_MITIGATION_RETPOLINE is defined.
+ * which is ensured when CONFIG_RETPOLINE is defined.
*/
-# define CALL_NOSPEC \
- ALTERNATIVE_2( \
@@ arch/x86/include/asm/nospec-branch.h: static inline void call_depth_return_thunk
- ANNOTATE_RETPOLINE_SAFE \
- "call *%[thunk_target]\n", \
- X86_FEATURE_RETPOLINE_LFENCE)
-+#ifdef CONFIG_MITIGATION_RETPOLINE
++#ifdef CONFIG_RETPOLINE
+#define CALL_NOSPEC "call __x86_indirect_thunk_%V[thunk_target]\n"
+#else
+#define CALL_NOSPEC "call *%[thunk_target]\n"
---
Results of testing on various branches:
| Branch | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.1.y | Success | Success |
next prev parent reply other threads:[~2025-05-17 13:08 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 23:59 [PATCH 5.15 v3 00/16] ITS mitigation Pawan Gupta
2025-05-16 23:59 ` [PATCH 5.15 v3 01/16] x86,nospec: Simplify {JMP,CALL}_NOSPEC Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-16 23:59 ` [PATCH 5.15 v3 02/16] x86/speculation: Simplify and make CALL_NOSPEC consistent Pawan Gupta
2025-05-17 13:08 ` Sasha Levin [this message]
2025-05-17 0:00 ` [PATCH 5.15 v3 03/16] x86/speculation: Add a conditional CS prefix to CALL_NOSPEC Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:00 ` [PATCH 5.15 v3 04/16] x86/speculation: Remove the extra #ifdef around CALL_NOSPEC Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:00 ` [PATCH 5.15 v3 05/16] Documentation: x86/bugs/its: Add ITS documentation Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:01 ` [PATCH 5.15 v3 06/16] x86/its: Enumerate Indirect Target Selection (ITS) bug Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:01 ` [PATCH 5.15 v3 07/16] x86/its: Add support for ITS-safe indirect thunk Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:01 ` [PATCH 5.15 v3 08/16] x86/alternative: Optimize returns patching Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:01 ` [PATCH 5.15 v3 09/16] x86/alternatives: Remove faulty optimization Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:02 ` [PATCH 5.15 v3 10/16] x86/its: Add support for ITS-safe return thunk Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:02 ` [PATCH 5.15 v3 11/16] x86/its: Enable Indirect Target Selection mitigation Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:02 ` [PATCH 5.15 v3 12/16] x86/its: Add "vmexit" option to skip mitigation on some CPUs Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:02 ` [PATCH 5.15 v3 13/16] x86/its: Align RETs in BHB clear sequence to avoid thunking Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:03 ` [PATCH 5.15 v3 14/16] x86/its: Use dynamic thunks for indirect branches Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:03 ` [PATCH 5.15 v3 15/16] x86/its: Fix build errors when CONFIG_MODULES=n Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-05-17 0:03 ` [PATCH 5.15 v3 16/16] x86/its: FineIBT-paranoid vs ITS Pawan Gupta
2025-05-17 13:08 ` Sasha Levin
2025-06-07 9:34 ` [PATCH 5.15 v3 00/16] ITS mitigation Salvatore Bonaccorso
2025-06-09 13:31 ` Pawan Gupta
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