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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pTCCX8XV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pTCCX8XV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79FCDC4CEE9; Tue, 20 May 2025 19:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747770776; bh=sVuIV87vGQNNhBH1C+IifHHMly6qW45dro2WlmwqoKE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=pTCCX8XVM9CEiOBZ79VhWuUwWU6FGvo2W901AQ4LYk4O44bVdXPD+YcX2kmgyjLTi 1+LgeF8JMlSIvH5ORHHLppC0LhPgisAd7j6rUtJjbnzyaocoljL7ga8x3l5MpXgwvv cQ0Oq8LN6prykF704uEZjAHRpdLmYqqOm68GjPaZJNhaAXvEM4x1esIYkFZwsYc4pP QopYcvL3vU8OnP1iDQI6WUY+n8EDsWXgTeZxc395GqVkr4fumvmRTBI1ucbDqObCCg OHMZhAneCp7TFzKEcFdGySTnVre2k5G2siQs4gTpPRPU7cKCLcoe8q1W6wlqT2bfuB r5JD92U70lgeQ== Date: Tue, 20 May 2025 14:52:54 -0500 From: Rob Herring To: Matthew Gerlach Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, richardcochran@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mun Yew Tham Subject: Re: [PATCH] dt-bindings: net: Convert socfpga-dwmac bindings to yaml Message-ID: <20250520195254.GA1247930-robh@kernel.org> References: <20250513152237.21541-1-matthew.gerlach@altera.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250513152237.21541-1-matthew.gerlach@altera.com> On Tue, May 13, 2025 at 08:22:37AM -0700, Matthew Gerlach wrote: > From: Mun Yew Tham > > Convert the bindings for socfpga-dwmac to yaml. > > Signed-off-by: Mun Yew Tham > Signed-off-by: Matthew Gerlach > --- > .../bindings/net/socfpga,dwmac.yaml | 109 ++++++++++++++++++ > .../devicetree/bindings/net/socfpga-dwmac.txt | 57 --------- > 2 files changed, 109 insertions(+), 57 deletions(-) > create mode 100644 Documentation/devicetree/bindings/net/socfpga,dwmac.yaml > delete mode 100644 Documentation/devicetree/bindings/net/socfpga-dwmac.txt > > diff --git a/Documentation/devicetree/bindings/net/socfpga,dwmac.yaml b/Documentation/devicetree/bindings/net/socfpga,dwmac.yaml > new file mode 100644 > index 000000000000..68ad580dc2da > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/socfpga,dwmac.yaml > @@ -0,0 +1,109 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/socfpga,dwmac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Altera SOCFPGA SoC DWMAC controller > + > +maintainers: > + - Matthew Gerlach > + > +select: > + properties: > + compatible: > + contains: > + enum: > + - altr,socfpga-stmmac > + - altr,socfpga-stmmac-a10-s10 > + required: > + - altr,sysmgr-syscon Should be 'compatible' here. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: altr,socfpga-stmmac > + - const: snps,dwmac-3.70a > + - const: snps,dwmac > + - items: > + - const: altr,socfpga-stmmac-a10-s10 > + - const: snps,dwmac-3.74a > + - const: snps,dwmac > + - items: > + - const: altr,socfpga-stmmac-a10-s10 > + - const: snps,dwmac-3.72a > + - const: snps,dwmac The last 2 lists can be combined. > + > + clocks: > + minItems: 1 > + maxItems: 4 You need to define what each entry is. > + > + clock-names: > + minItems: 1 > + maxItems: 4 And the name for each entry. > + > + phy-mode: > + enum: > + - rgmii > + - sgmii > + - gmii > + > + altr,emac-splitter: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Should be the phandle to the emac splitter soft IP node if DWMAC > + controller is connected an emac splitter. > + > + altr,f2h_ptp_ref_clk: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to Precision Time Protocol reference clock. This clock is > + common to gmac instances and defaults to osc1. > + > + altr,gmii-to-sgmii-converter: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Should be the phandle to the gmii to sgmii converter soft IP. > + > + altr,sysmgr-syscon: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: > + Should be the phandle to the system manager node that encompass > + the glue register, the register offset, and the register shift. > + On Cyclone5/Arria5, the register shift represents the PHY mode > + bits, while on the Arria10/Stratix10/Agilex platforms, the > + register shift represents bit for each emac to enable/disable > + signals from the FPGA fabric to the EMAC modules. > + minItems: 1 > + items: > + - description: phandle to the system manager node > + - description: offset of the control register > + - description: shift within the control register items: - items: - description: phandle to the system manager node - ... - ... And drop minItems. > + > +allOf: > + - $ref: snps,dwmac.yaml# > + > +additionalProperties: true unevaluatedProperties: false > + > +examples: > + > + - | > + #include > + #include > + soc { > + #address-cells = <1>; Use 4 space indent. > + #size-cells = <1>; > + gmac0: ethernet@ff700000 { Drop the label. > + compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", > + "snps,dwmac"; > + altr,sysmgr-syscon = <&sysmgr 0x60 0>; > + reg = <0xff700000 0x2000>; > + interrupts = ; > + interrupt-names = "macirq"; > + mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */ > + clocks = <&emac_0_clk>; > + clock-names = "stmmaceth"; > + phy-mode = "sgmii"; > + }; > + };