Re: [PATCH 34/36] mmc: sunxi: Use devm_mmc_alloc_host() helper

[kernel test robot <lkp@intel.com>]

Hi Binbin,

kernel test robot noticed the following build errors:

[auto build test ERROR on eb68ba4af6da720caaf752b5618220efd5cf31dc]

url:    https://github.com/intel-lab-lkp/linux/commits/Binbin-Zhou/mmc-alcor-Use-devm_mmc_alloc_host-helper/20250520-194815
base:   eb68ba4af6da720caaf752b5618220efd5cf31dc
patch link:    https://lore.kernel.org/r/e6aa4f46c471bb0178ba9b8bdf285a38f2684d56.1747739323.git.zhoubinbin%40loongson.cn
patch subject: [PATCH 34/36] mmc: sunxi: Use devm_mmc_alloc_host() helper
config: x86_64-buildonly-randconfig-004-20250521 (https://download.01.org/0day-ci/archive/20250521/202505210851.GG2RNi84-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250521/202505210851.GG2RNi84-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505210851.GG2RNi84-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/mmc/host/sunxi-mmc.c: In function 'sunxi_mmc_probe':
>> drivers/mmc/host/sunxi-mmc.c:1391:38: error: stray '`' in program
    1391 |                                      `"Failed to allocate DMA descriptor mem\n");
         |                                      ^


vim +1391 drivers/mmc/host/sunxi-mmc.c

  1365	
  1366	static int sunxi_mmc_probe(struct platform_device *pdev)
  1367	{
  1368		struct sunxi_mmc_host *host;
  1369		struct mmc_host *mmc;
  1370		int ret;
  1371	
  1372		mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host));
  1373		if (!mmc)
  1374			return dev_err_probe(&pdev->dev, -ENOMEM,
  1375					     "mmc alloc host failed\n");
  1376		platform_set_drvdata(pdev, mmc);
  1377	
  1378		host = mmc_priv(mmc);
  1379		host->dev = &pdev->dev;
  1380		host->mmc = mmc;
  1381		spin_lock_init(&host->lock);
  1382	
  1383		ret = sunxi_mmc_resource_request(host, pdev);
  1384		if (ret)
  1385			return ret;
  1386	
  1387		host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
  1388						  &host->sg_dma, GFP_KERNEL);
  1389		if (!host->sg_cpu)
  1390			return dev_err_probe(&pdev->dev, -ENOMEM,
> 1391					     `"Failed to allocate DMA descriptor mem\n");
  1392	
  1393		if (host->cfg->ccu_has_timings_switch) {
  1394			/*
  1395			 * Supports both old and new timing modes.
  1396			 * Try setting the clk to new timing mode.
  1397			 */
  1398			sunxi_ccu_set_mmc_timing_mode(host->clk_mmc, true);
  1399	
  1400			/* And check the result */
  1401			ret = sunxi_ccu_get_mmc_timing_mode(host->clk_mmc);
  1402			if (ret < 0) {
  1403				/*
  1404				 * For whatever reason we were not able to get
  1405				 * the current active mode. Default to old mode.
  1406				 */
  1407				dev_warn(&pdev->dev, "MMC clk timing mode unknown\n");
  1408				host->use_new_timings = false;
  1409			} else {
  1410				host->use_new_timings = !!ret;
  1411			}
  1412		} else if (host->cfg->needs_new_timings) {
  1413			/* Supports new timing mode only */
  1414			host->use_new_timings = true;
  1415		}
  1416	
  1417		mmc->ops		= &sunxi_mmc_ops;
  1418		mmc->max_blk_count	= 8192;
  1419		mmc->max_blk_size	= 4096;
  1420		mmc->max_segs		= PAGE_SIZE / sizeof(struct sunxi_idma_des);
  1421		mmc->max_seg_size	= (1 << host->cfg->idma_des_size_bits);
  1422		mmc->max_req_size	= mmc->max_seg_size * mmc->max_segs;
  1423		/* 400kHz ~ 52MHz */
  1424		mmc->f_min		=   400000;
  1425		mmc->f_max		= 52000000;
  1426		mmc->caps	       |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  1427					  MMC_CAP_SDIO_IRQ;
  1428	
  1429		/*
  1430		 * Some H5 devices do not have signal traces precise enough to
  1431		 * use HS DDR mode for their eMMC chips.
  1432		 *
  1433		 * We still enable HS DDR modes for all the other controller
  1434		 * variants that support them.
  1435		 */
  1436		if ((host->cfg->clk_delays || host->use_new_timings) &&
  1437		    !of_device_is_compatible(pdev->dev.of_node,
  1438					     "allwinner,sun50i-h5-emmc"))
  1439			mmc->caps      |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
  1440	
  1441		ret = mmc_of_parse(mmc);
  1442		if (ret)
  1443			goto error_free_dma;
  1444	
  1445		/*
  1446		 * If we don't support delay chains in the SoC, we can't use any
  1447		 * of the higher speed modes. Mask them out in case the device
  1448		 * tree specifies the properties for them, which gets added to
  1449		 * the caps by mmc_of_parse() above.
  1450		 */
  1451		if (!(host->cfg->clk_delays || host->use_new_timings)) {
  1452			mmc->caps &= ~(MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR |
  1453				       MMC_CAP_1_2V_DDR | MMC_CAP_UHS);
  1454			mmc->caps2 &= ~MMC_CAP2_HS200;
  1455		}
  1456	
  1457		/* TODO: This driver doesn't support HS400 mode yet */
  1458		mmc->caps2 &= ~MMC_CAP2_HS400;
  1459	
  1460		ret = sunxi_mmc_init_host(host);
  1461		if (ret)
  1462			goto error_free_dma;
  1463	
  1464		pm_runtime_set_active(&pdev->dev);
  1465		pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
  1466		pm_runtime_use_autosuspend(&pdev->dev);
  1467		pm_runtime_enable(&pdev->dev);
  1468	
  1469		ret = mmc_add_host(mmc);
  1470		if (ret)
  1471			goto error_free_dma;
  1472	
  1473		dev_info(&pdev->dev, "initialized, max. request size: %u KB%s\n",
  1474			 mmc->max_req_size >> 10,
  1475			 host->use_new_timings ? ", uses new timings mode" : "");
  1476	
  1477		return 0;
  1478	
  1479	error_free_dma:
  1480		dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
  1481		return ret;
  1482	}
  1483	

-- 
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https://github.com/intel/lkp-tests/wiki