From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A405DC54F30 for ; Tue, 27 May 2025 11:38:45 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3F93783022; Tue, 27 May 2025 13:38:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1748345924; bh=aQjjEgXk/VCkQzB0ANRswD2uclT5Rjm5QIM4STLWJWo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; 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dkim-atps=neutral Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 17FB11039728C; Tue, 27 May 2025 13:38:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=mx-20241105; t=1748345919; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=aQjjEgXk/VCkQzB0ANRswD2uclT5Rjm5QIM4STLWJWo=; b=XgPyA3KCPnk+NEGoqWm2D5L90n6oQZq/IvVmEkXEjjBCTpxi2WdO3W4LnsmxtrR3ClvvxD 4lSAtKyVG4iAGAA+2PobE5KVZ58WconClB0fkSgbU/hQsYZ3iFYBSyXPUQ6a27A0EdYRQ4 ZJ5hjg+FgYEetZxkMy7l0BMHRDGXb4CW+ZgmqGZVqBuVRdora+oCMuL5OTGL0PZXDnYliD Xdc4s5S8Xvlt46uB1uxneAXCGjXcgcmMNz2gsBFrSwIuh5kIu8NeNxRNsJB6XnY/ga9cWr XSrsP3CqpjDZVnOV5zBSDE7IfZ8DsytKTHZQFG1IS+TPGT5xFGcFJOvGDXmLcA== From: Philip Oberfichtner To: u-boot@lists.denx.de Cc: Philip Oberfichtner , Daniel Schwierzeck , GSS_MTK_Uboot_upstream , Jiaxun Yang , Marek Vasut , Simon Glass , Stefan Roese , Sumit Garg , Tom Rini , Weijie Gao Subject: [PATCH 2/2] mips: mt7628: Add Onion Omega2/2+ board support Date: Tue, 27 May 2025 13:37:51 +0200 Message-Id: <20250527113751.95741-3-pro@denx.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250527113751.95741-1-pro@denx.de> References: <20250527113751.95741-1-pro@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The Omega2 / Omega2+ are based on the MediaTek MT7688 SoC with the following features: - 64 / 128MB of DDR2 memory - 16 / 32MB of SPI NOR flash - USB, WiFi and many more peripherals Signed-off-by: Philip Oberfichtner --- arch/mips/dts/Makefile | 1 + arch/mips/dts/onion-omega2p.dts | 58 ++++++++++++ arch/mips/mach-mtmips/mt7628/Kconfig | 7 ++ board/onion/omega2p/Kconfig | 12 +++ board/onion/omega2p/Makefile | 3 + board/onion/omega2p/board.c | 134 +++++++++++++++++++++++++++ board/onion/omega2p/omega2p.env | 18 ++++ configs/onion-omega2p_defconfig | 81 ++++++++++++++++ include/configs/onion-omega2p.h | 15 +++ 9 files changed, 329 insertions(+) create mode 100644 arch/mips/dts/onion-omega2p.dts create mode 100644 board/onion/omega2p/Kconfig create mode 100644 board/onion/omega2p/Makefile create mode 100644 board/onion/omega2p/board.c create mode 100644 board/onion/omega2p/omega2p.env create mode 100644 configs/onion-omega2p_defconfig create mode 100644 include/configs/onion-omega2p.h diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 7c4ee8b668b..d57fc4f6b3e 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -21,6 +21,7 @@ dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb +dtb-$(CONFIG_BOARD_ONION_OMEGA2P) += onion-omega2p.dtb dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += mrvl,octeon-ebb7304.dtb dtb-$(CONFIG_TARGET_OCTEON_NIC23) += mrvl,octeon-nic23.dtb dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb diff --git a/arch/mips/dts/onion-omega2p.dts b/arch/mips/dts/onion-omega2p.dts new file mode 100644 index 00000000000..64fecba1db9 --- /dev/null +++ b/arch/mips/dts/onion-omega2p.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Zheng Han , Lazar Demin + */ + +/dts-v1/; + +#include "mt7628a.dtsi" +#include + +/ { + compatible = "onion,omega2", "onion,omega2p", "ralink,mt7628a-soc"; + model = "Onion Omega2/Omega2+"; + + aliases { + serial0 = &uart0; + spi0 = &spi0; + }; + + chosen { + stdout-path = &uart0; + }; +}; + +&pinctrl { + state_default: pin_state { + p0led { + groups = "p0led_a"; + function = "led"; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + num-cs = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&spi_dual_pins>; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + reg = <0>; + }; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&ephy_iot_mode>; + mediatek,poll-link-phy = <0>; +}; diff --git a/arch/mips/mach-mtmips/mt7628/Kconfig b/arch/mips/mach-mtmips/mt7628/Kconfig index 79b2ddc6692..a75196eaefd 100644 --- a/arch/mips/mach-mtmips/mt7628/Kconfig +++ b/arch/mips/mach-mtmips/mt7628/Kconfig @@ -27,6 +27,12 @@ config BOARD_MT7628_RFB SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host, 1 SDXC, 1 PCIe socket and JTAG pins. +config BOARD_ONION_OMEGA2 + bool "Onion Omega2/2+" + help + Onion Omega2/2+ IoT computer. Has a MT7688 SoC with 64/128 MiB of DDR2 + RAM and 16/32 MiB of SPI flash. + config BOARD_VOCORE2 bool "VoCore2" select SPL_SERIAL @@ -52,6 +58,7 @@ config SYS_CONFIG_NAME default "mt7628" if BOARD_MT7628_RFB source "board/gardena/smart-gateway-mt7688/Kconfig" +source "board/onion/omega2p/Kconfig" source "board/seeed/linkit-smart-7688/Kconfig" source "board/vocore/vocore2/Kconfig" diff --git a/board/onion/omega2p/Kconfig b/board/onion/omega2p/Kconfig new file mode 100644 index 00000000000..d72977d97ed --- /dev/null +++ b/board/onion/omega2p/Kconfig @@ -0,0 +1,12 @@ +if BOARD_ONION_OMEGA2P + +config SYS_BOARD + default "omega2p" + +config SYS_VENDOR + default "onion" + +config SYS_CONFIG_NAME + default "onion-omega2p" + +endif diff --git a/board/onion/omega2p/Makefile b/board/onion/omega2p/Makefile new file mode 100644 index 00000000000..70cd7a8e568 --- /dev/null +++ b/board/onion/omega2p/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += board.o diff --git a/board/onion/omega2p/board.c b/board/onion/omega2p/board.c new file mode 100644 index 00000000000..9d8ac8632d1 --- /dev/null +++ b/board/onion/omega2p/board.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024 Zheng Han , Lazar Demin + * Copyright (C) 2025 DENX Software Engineering GmbH, Philip Oberfichtner + */ + +#include +#include +#include +#include + +#define OMEGA2_REG(x) (*((volatile u32 *)(x))) +#define OMEGA2_SYSCTL_BASE 0xB0000000 +#define OMEGA2_SYS_CNTL_BASE (OMEGA2_SYSCTL_BASE) +#define OMEGA2_REG_PIODIR (OMEGA2_SYSCTL_BASE + 0x600) + +static int detect_rst( void ) +{ + u32 val; + val=OMEGA2_REG(0xb0000624); // Read GPIO 44 (reset button) + + return (val&1<<6) ? 1 : 0; +} + +static void gpio_init(void) +{ + u32 val; + printf( "Initializing MT7688 GPIO system.\n" ); + + //set gpio2_mode - setting wled, and p0,p1,p2,p3,p4 LED pins to GPIO mode + val = 0x555; + OMEGA2_REG(OMEGA2_SYS_CNTL_BASE+0x64)=val; // GPIO2_MODE register + // GINT_FEDGE_1: setting "Enable falling edge triggered" for GPIOs 39-42 + OMEGA2_REG(0xb0000644)=0x0f<<7; + + // set gpio_ctrl_1 register: set GPIO44 to output + //gpio44 output gpio_ctrl_1 bit3=1 + val=OMEGA2_REG(OMEGA2_REG_PIODIR+0x04); + val|=1<<12; + OMEGA2_REG(OMEGA2_REG_PIODIR+0x04)=val; + + // set gpio1_mode register: set WDT_MODE to GPIO mode + //set gpio1_mode 14=1b1 + val=OMEGA2_REG(OMEGA2_SYS_CNTL_BASE+0x60); + val|=1<<14; + OMEGA2_REG(OMEGA2_SYS_CNTL_BASE+0x60)=val; + + // set gpio_ctrl_1 resgister: set GPIO38 to input + //gpio38 input gpio_ctrl_1 bit5=0 + val=OMEGA2_REG(OMEGA2_REG_PIODIR+0x04); + val&=~1<<6; + OMEGA2_REG(OMEGA2_REG_PIODIR+0x04)=val; +} + +enum onion_board_variant { + OMEGA2, + OMEGA2P, + UNKNOWN, +}; + +static enum onion_board_variant board_variant(void) +{ + struct mtd_info *mtd; + + mtd_probe_devices(); + + mtd_for_each_device(mtd) { + if (mtd->type != MTD_NORFLASH) + continue; + + switch (mtd->size) { + case 16*1024*1024: // 16 MB + return OMEGA2; + + case 32*1024*1024: // 32 MB + return OMEGA2P; + + default: + break; + } + } + + return UNKNOWN; +} + +#define ONION_MTDPARTS_BASE "spi0.0:192k(u-boot),64k(u-boot-env),64k(factory)" + +static void set_mtdparts(void) +{ + switch (board_variant()) { + case OMEGA2P: + printf("Detected board variant OMEGA2+: "); + env_set("mtdparts", ONION_MTDPARTS_BASE ",32448k(firmware)"); + break; + + case OMEGA2: + printf("Detected board variant OMEGA2: "); + env_set("mtdparts", ONION_MTDPARTS_BASE ",16064k(firmware)"); + break; + + default: + printf("Unable to detect board variant! Using default value: "); + env_set("mtdparts", ONION_MTDPARTS_BASE); + } + + printf("mtdparts=\"%s\"\n", env_get("mtdparts")); +} + +#define WELCOME_MESSAGE \ + "\n\n" \ + " *************************************************************\n"\ + " * For more info on using U-Boot, visit *\n"\ + " * https://documentation.onioniot.com/bootloader/overview *\n"\ + " * *\n"\ + " * Hold the reset button to enter the U-Boot commandline. *\n"\ + " *************************************************************\n"\ + "\n" + +int board_late_init (void) +{ + gpio_init(); + + printf(WELCOME_MESSAGE); + + set_mtdparts(); + + if (detect_rst()) { + printf("Reset button pressed - entering shell ...\n"); + env_set("reset_pressed", "1"); + // This env variable is evaluated by our bootcmd. + } + + return 0; +} diff --git a/board/onion/omega2p/omega2p.env b/board/onion/omega2p/omega2p.env new file mode 100644 index 00000000000..ff3fdcadf90 --- /dev/null +++ b/board/onion/omega2p/omega2p.env @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2025 DENX Software Engineering GmbH, Philip Oberfichtner + +# Boot options +bootargs=console=ttyS0,115200 rootfstype=squashfs,jffs2 +bootfile=firmware.bin +boot_linux=sf probe && mtd read firmware 81800000 0 400000 && bootm 81800000 +enter_shell=env set reset_pressed # unset variable +bootcmd= if test -z "${reset_pressed}"; then run boot_linux; else run enter_shell; fi + +# Network configuration +serverip=192.168.8.100 +ipaddr=192.168.8.8 +loadaddr=0x81800000 + +# MTD settings +mtdids=nor0=spi0.0 +# mtdparts will be set at runtime, according to the specific board variant. diff --git a/configs/onion-omega2p_defconfig b/configs/onion-omega2p_defconfig new file mode 100644 index 00000000000..047f14f4e6b --- /dev/null +++ b/configs/onion-omega2p_defconfig @@ -0,0 +1,81 @@ +CONFIG_MIPS=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_MALLOC_LEN=0x1000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x30000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="onion-omega2p" +CONFIG_SPL_SERIAL=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SYS_LOAD_ADDR=0x81800000 +CONFIG_SPL=y +CONFIG_ARCH_MTMIPS=y +CONFIG_SOC_MT7628=y +CONFIG_BOARD_ONION_OMEGA2P=y +CONFIG_SYS_MIPS_TIMER_FREQ=290000000 +CONFIG_MIPS_CACHE_SETUP=y +CONFIG_MIPS_CACHE_DISABLE=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_UBOOT_WITH_SPL_SIZE_LIMIT=0x30000 +CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_ELF is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_DEFAULT_ENV_FILE="board/onion/omega2p/omega2p.env" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.8.8" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.8.100" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_MT7628_ETH=y +CONFIG_PHY=y +CONFIG_SPI=y +CONFIG_MT7621_SPI=y +CONFIG_LZMA=y +# CONFIG_GZIP is not set +CONFIG_SPL_LZMA=y diff --git a/include/configs/onion-omega2p.h b/include/configs/onion-omega2p.h new file mode 100644 index 00000000000..ca170b22a40 --- /dev/null +++ b/include/configs/onion-omega2p.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024 Zheng Han , Lazar Demin + */ +#ifndef __CONFIG_ONION_OMEGA2P_H +#define __CONFIG_ONION_OMEGA2P_H + +/* RAM */ +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 + +/* Dummy value */ +#define CFG_SYS_UBOOT_BASE 0 + +#endif /* __CONFIG_ONION_OMEGA2P_H */ -- 2.39.5