From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CF6EC54FB3 for ; Mon, 2 Jun 2025 00:21:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=uNpvnZMZ/JBgqhLYgsVz/siWmbeBCX7RyXul6meyDhQ=; b=Bu5sTkOW5exPFLoygv5hwIzI6Y 8TqZkC96mF4PprQCOfraVU2F7zlUmWKYEqyVOPrni4EqksGMGNB85AQ6UeZfmRV+QvLCWMW5Vkmzf Km/vFAr3ZUWXKl3+2Ne6H8aXgTMLuvW1IppvBv/bBmO521BikHQ4OX79DhwtuLjSYu41wH97K/Qua riMYLSs0Isv+HOvEDLXawp01FswKCA1KPm6Uzbe6QgyxHHnllLTD1jT2/VIoqndfL+yOhNupTRTZp yxxBW32PfSdG+IFBGkWeN5UFRxm+1mnvJphTjLS5iraoVRpPV6ysX9qwYDFj0Ec8IX6vEwqYk5oKO TzVD1LOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uLsvq-00000006HMu-478I; Mon, 02 Jun 2025 00:21:38 +0000 Received: from nyc.source.kernel.org ([147.75.193.91]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uLsC1-000000067P1-2xxM; Sun, 01 Jun 2025 23:34:19 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 0CA6CA4FB24; Sun, 1 Jun 2025 23:34:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A7D4C4CEEE; Sun, 1 Jun 2025 23:34:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748820856; bh=321iH7ydrU3/KSvdE6RbQgyEV/rdh1AcZlUGOHc7Y30=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hlxk/F8bYyGBBLwGRqATZNueEi6a1FIh5govDEfaY0tzYegVc7NqEOj0adpc2hfWv QRqJdmK0xDJx01K/QYG9Nlgd2aVUPN1SSKdV6reYN2gzYVD1Vs3PBNY+2s2XePFALD rkmQ/wyrpwO1g2xSPfadwmnw8+cJ2PGc05YNbLVhdTGl/n9oerAGGKtwVUD6inigNf 3LVLgHYb8GKBDvw6QxcQSvX4yWldml9PmZ8OSX243Moa1cRDZOpXmBfh9Ob/8c3wT9 gmK0cF7KF+kuN5y+VRf69SuEkld/KhRBe1PPU01uBefllywuUqFB1lAHeh/plOm6j1 ebbnfTVJENMAQ== From: Sasha Levin To: patches@lists.linux.dev, stable@vger.kernel.org Cc: Andy Yan , Heiko Stuebner , Sasha Levin , hjc@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH AUTOSEL 6.12 05/93] drm/rockchip: inno-hdmi: Fix video timing HSYNC/VSYNC polarity setting for rk3036 Date: Sun, 1 Jun 2025 19:32:32 -0400 Message-Id: <20250601233402.3512823-5-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250601233402.3512823-1-sashal@kernel.org> References: <20250601233402.3512823-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.12.31 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250601_163417_882412_273AA467 X-CRM114-Status: GOOD ( 22.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Andy Yan [ Upstream commit ad10b82c2bcac7f87ac6eaecfca33378b43425ee ] The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF. Without the polarity configuration in GRF, it can be observed from the HDMI protocol analyzer that the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications. Signed-off-by: Andy Yan Tested-by: Heiko Stuebner #rk3036-kylin Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250422070455.432666-5-andyshrk@163.com Signed-off-by: Sasha Levin --- ## Analysis Based on my analysis of the commit message and code changes, my answer is: **YES**, this commit should be backported to stable kernel trees. ## Detailed Explanation: ### 1. **Bug Fix Nature** This commit fixes a specific bug where HSYNC/VSYNC polarity settings for RK3036 HDMI were not being properly configured. According to the commit message, "the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications" when observed on an HDMI protocol analyzer. This is a clear functionality bug affecting users. ### 2. **Hardware-Specific Fix** The fix addresses a hardware requirement specific to RK3036 where the HSYNC/VSYNC polarity must be configured through the GRF (General Register File) rather than just through the HDMI controller registers. The code shows: ```c + if (hdmi->variant->dev_type == RK3036_HDMI) { + psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; + value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); + psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; + value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); + regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); + } ``` ### 3. **Minimal and Contained Changes** The fix is: - Small in scope (adds ~30 lines of code) - Contained to the specific hardware variant (RK3036) - Does not affect other hardware variants (protected by `if (hdmi->variant->dev_type == RK3036_HDMI)`) - Only adds necessary GRF configuration without changing existing logic ### 4. **Long-standing Issue** The driver was originally added in 2016 (commit 412d4ae6b7a5), and this polarity issue has been present since then. This suggests users of RK3036 hardware have been experiencing incorrect HDMI timing output for years. ### 5. **Similar to Previously Backported Fixes** Looking at the similar commits provided: - Commit #1 (47a145c03484) fixed video timing issues and was backported (YES) - Commit #2 (604be85547ce) fixed sync polarities for different Rockchip hardware and was backported (YES) This commit follows the same pattern of fixing display timing/polarity issues in Rockchip display drivers. ### 6. **No Risk of Regression** The change: - Only affects RK3036 hardware when specifically identified - Adds proper hardware configuration that was missing - Does not modify existing behavior for other variants - Has been tested on actual hardware (per the Tested-by tag) ### 7. **Clear User Impact** Without this fix, RK3036 HDMI users experience: - Incorrect video timing that doesn't meet HDMI specifications - Potential display compatibility issues - Unstable or non-functional HDMI output with certain displays This directly impacts the usability of HDMI output on RK3036-based devices, making it an important fix for stable users. The commit meets all criteria for stable backporting: it's a clear bug fix, minimal in scope, has no architectural changes, fixes a real user-visible issue, and has very low risk of introducing regressions. drivers/gpu/drm/rockchip/inno_hdmi.c | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 42ef62aa0a1e0..d2f0807260cf2 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -10,10 +10,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -29,8 +31,19 @@ #include "inno_hdmi.h" +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) + #define INNO_HDMI_MIN_TMDS_CLOCK 25000000U +#define RK3036_GRF_SOC_CON2 0x148 +#define RK3036_HDMI_PHSYNC BIT(4) +#define RK3036_HDMI_PVSYNC BIT(5) + +enum inno_hdmi_dev_type { + RK3036_HDMI, + RK3128_HDMI, +}; + struct inno_hdmi_phy_config { unsigned long pixelclock; u8 pre_emphasis; @@ -38,6 +51,7 @@ struct inno_hdmi_phy_config { }; struct inno_hdmi_variant { + enum inno_hdmi_dev_type dev_type; struct inno_hdmi_phy_config *phy_configs; struct inno_hdmi_phy_config *default_phy_config; }; @@ -58,6 +72,7 @@ struct inno_hdmi { struct clk *pclk; struct clk *refclk; void __iomem *regs; + struct regmap *grf; struct drm_connector connector; struct rockchip_encoder encoder; @@ -374,7 +389,15 @@ static int inno_hdmi_config_video_csc(struct inno_hdmi *hdmi) static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi, struct drm_display_mode *mode) { - int value; + int value, psync; + + if (hdmi->variant->dev_type == RK3036_HDMI) { + psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; + value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); + psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; + value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); + regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); + } /* Set detail external video timing polarity and interlace mode */ value = v_EXTERANL_VIDEO(1); @@ -911,6 +934,15 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, goto err_disable_pclk; } + if (hdmi->variant->dev_type == RK3036_HDMI) { + hdmi->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); + if (IS_ERR(hdmi->grf)) { + ret = dev_err_probe(dev, PTR_ERR(hdmi->grf), + "Unable to get rockchip,grf\n"); + goto err_disable_clk; + } + } + irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; @@ -995,11 +1027,13 @@ static void inno_hdmi_remove(struct platform_device *pdev) } static const struct inno_hdmi_variant rk3036_inno_hdmi_variant = { + .dev_type = RK3036_HDMI, .phy_configs = rk3036_hdmi_phy_configs, .default_phy_config = &rk3036_hdmi_phy_configs[1], }; static const struct inno_hdmi_variant rk3128_inno_hdmi_variant = { + .dev_type = RK3128_HDMI, .phy_configs = rk3128_hdmi_phy_configs, .default_phy_config = &rk3128_hdmi_phy_configs[1], }; -- 2.39.5 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35638C5B543 for ; Mon, 2 Jun 2025 00:21:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sXwyJ5JJYws67xPGApbBT9w0IVcuV5c+IwqRE7NcX7o=; b=dNs+onvkphWZP2 AuiOmT8vrdyCAkep6ERBdQk60E0oioyZEMzHQZ04BaksU+ilzgqlGcVDgCdnXLHoi0HIHVt81N9oy HrvA1ioP38RxMDcYVOzxX++PBEIWwFp2kgivuf7d6CsghvfiZoF9UVgVXT/9Y78cP41lfTKHpuMyj U+kcJrKzkTOtmWQ2orVy2Ug7Pc3d8h4jyjSwPlqHmdrcEfndJr5bWsVGwtRrvE6XJQKtrm02iVe+E JN2QS0aMuEF+lyViuhawLRG/lVRTRAHrs5vqlSbJEt3qMdmGwux7K7s7AL7kT+yG681XJf7dQjXpO s+mVTAZn1f8IB5PUNAgw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uLsvr-00000006HNC-2A9e; Mon, 02 Jun 2025 00:21:39 +0000 Received: from nyc.source.kernel.org ([147.75.193.91]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uLsC1-000000067P1-2xxM; Sun, 01 Jun 2025 23:34:19 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 0CA6CA4FB24; Sun, 1 Jun 2025 23:34:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A7D4C4CEEE; Sun, 1 Jun 2025 23:34:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748820856; bh=321iH7ydrU3/KSvdE6RbQgyEV/rdh1AcZlUGOHc7Y30=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hlxk/F8bYyGBBLwGRqATZNueEi6a1FIh5govDEfaY0tzYegVc7NqEOj0adpc2hfWv QRqJdmK0xDJx01K/QYG9Nlgd2aVUPN1SSKdV6reYN2gzYVD1Vs3PBNY+2s2XePFALD rkmQ/wyrpwO1g2xSPfadwmnw8+cJ2PGc05YNbLVhdTGl/n9oerAGGKtwVUD6inigNf 3LVLgHYb8GKBDvw6QxcQSvX4yWldml9PmZ8OSX243Moa1cRDZOpXmBfh9Ob/8c3wT9 gmK0cF7KF+kuN5y+VRf69SuEkld/KhRBe1PPU01uBefllywuUqFB1lAHeh/plOm6j1 ebbnfTVJENMAQ== From: Sasha Levin To: patches@lists.linux.dev, stable@vger.kernel.org Cc: Andy Yan , Heiko Stuebner , Sasha Levin , hjc@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH AUTOSEL 6.12 05/93] drm/rockchip: inno-hdmi: Fix video timing HSYNC/VSYNC polarity setting for rk3036 Date: Sun, 1 Jun 2025 19:32:32 -0400 Message-Id: <20250601233402.3512823-5-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250601233402.3512823-1-sashal@kernel.org> References: <20250601233402.3512823-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.12.31 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250601_163417_882412_273AA467 X-CRM114-Status: GOOD ( 22.21 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Andy Yan [ Upstream commit ad10b82c2bcac7f87ac6eaecfca33378b43425ee ] The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF. Without the polarity configuration in GRF, it can be observed from the HDMI protocol analyzer that the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications. Signed-off-by: Andy Yan Tested-by: Heiko Stuebner #rk3036-kylin Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250422070455.432666-5-andyshrk@163.com Signed-off-by: Sasha Levin --- ## Analysis Based on my analysis of the commit message and code changes, my answer is: **YES**, this commit should be backported to stable kernel trees. ## Detailed Explanation: ### 1. **Bug Fix Nature** This commit fixes a specific bug where HSYNC/VSYNC polarity settings for RK3036 HDMI were not being properly configured. According to the commit message, "the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications" when observed on an HDMI protocol analyzer. This is a clear functionality bug affecting users. ### 2. **Hardware-Specific Fix** The fix addresses a hardware requirement specific to RK3036 where the HSYNC/VSYNC polarity must be configured through the GRF (General Register File) rather than just through the HDMI controller registers. The code shows: ```c + if (hdmi->variant->dev_type == RK3036_HDMI) { + psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; + value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); + psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; + value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); + regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); + } ``` ### 3. **Minimal and Contained Changes** The fix is: - Small in scope (adds ~30 lines of code) - Contained to the specific hardware variant (RK3036) - Does not affect other hardware variants (protected by `if (hdmi->variant->dev_type == RK3036_HDMI)`) - Only adds necessary GRF configuration without changing existing logic ### 4. **Long-standing Issue** The driver was originally added in 2016 (commit 412d4ae6b7a5), and this polarity issue has been present since then. This suggests users of RK3036 hardware have been experiencing incorrect HDMI timing output for years. ### 5. **Similar to Previously Backported Fixes** Looking at the similar commits provided: - Commit #1 (47a145c03484) fixed video timing issues and was backported (YES) - Commit #2 (604be85547ce) fixed sync polarities for different Rockchip hardware and was backported (YES) This commit follows the same pattern of fixing display timing/polarity issues in Rockchip display drivers. ### 6. **No Risk of Regression** The change: - Only affects RK3036 hardware when specifically identified - Adds proper hardware configuration that was missing - Does not modify existing behavior for other variants - Has been tested on actual hardware (per the Tested-by tag) ### 7. **Clear User Impact** Without this fix, RK3036 HDMI users experience: - Incorrect video timing that doesn't meet HDMI specifications - Potential display compatibility issues - Unstable or non-functional HDMI output with certain displays This directly impacts the usability of HDMI output on RK3036-based devices, making it an important fix for stable users. The commit meets all criteria for stable backporting: it's a clear bug fix, minimal in scope, has no architectural changes, fixes a real user-visible issue, and has very low risk of introducing regressions. drivers/gpu/drm/rockchip/inno_hdmi.c | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 42ef62aa0a1e0..d2f0807260cf2 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -10,10 +10,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -29,8 +31,19 @@ #include "inno_hdmi.h" +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) + #define INNO_HDMI_MIN_TMDS_CLOCK 25000000U +#define RK3036_GRF_SOC_CON2 0x148 +#define RK3036_HDMI_PHSYNC BIT(4) +#define RK3036_HDMI_PVSYNC BIT(5) + +enum inno_hdmi_dev_type { + RK3036_HDMI, + RK3128_HDMI, +}; + struct inno_hdmi_phy_config { unsigned long pixelclock; u8 pre_emphasis; @@ -38,6 +51,7 @@ struct inno_hdmi_phy_config { }; struct inno_hdmi_variant { + enum inno_hdmi_dev_type dev_type; struct inno_hdmi_phy_config *phy_configs; struct inno_hdmi_phy_config *default_phy_config; }; @@ -58,6 +72,7 @@ struct inno_hdmi { struct clk *pclk; struct clk *refclk; void __iomem *regs; + struct regmap *grf; struct drm_connector connector; struct rockchip_encoder encoder; @@ -374,7 +389,15 @@ static int inno_hdmi_config_video_csc(struct inno_hdmi *hdmi) static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi, struct drm_display_mode *mode) { - int value; + int value, psync; + + if (hdmi->variant->dev_type == RK3036_HDMI) { + psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; + value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); + psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; + value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); + regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); + } /* Set detail external video timing polarity and interlace mode */ value = v_EXTERANL_VIDEO(1); @@ -911,6 +934,15 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, goto err_disable_pclk; } + if (hdmi->variant->dev_type == RK3036_HDMI) { + hdmi->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); + if (IS_ERR(hdmi->grf)) { + ret = dev_err_probe(dev, PTR_ERR(hdmi->grf), + "Unable to get rockchip,grf\n"); + goto err_disable_clk; + } + } + irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; @@ -995,11 +1027,13 @@ static void inno_hdmi_remove(struct platform_device *pdev) } static const struct inno_hdmi_variant rk3036_inno_hdmi_variant = { + .dev_type = RK3036_HDMI, .phy_configs = rk3036_hdmi_phy_configs, .default_phy_config = &rk3036_hdmi_phy_configs[1], }; static const struct inno_hdmi_variant rk3128_inno_hdmi_variant = { + .dev_type = RK3128_HDMI, .phy_configs = rk3128_hdmi_phy_configs, .default_phy_config = &rk3128_hdmi_phy_configs[1], }; -- 2.39.5 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip