From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
david.e.box@linux.intel.com, hdegoede@redhat.com,
ilpo.jarvinen@linux.intel.com,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v2 5/5] platform/x86:intel/pmc: Enable SSRAM support for Panther Lake
Date: Tue, 24 Jun 2025 23:31:42 -0700 [thread overview]
Message-ID: <20250625063145.624585-6-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20250625063145.624585-1-xi.pardee@linux.intel.com>
Enable Panther Lake platforms to achieve PMC information from
Intel PMC SSRAM Telemetry driver and substate requirements data
from telemetry region.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
drivers/platform/x86/intel/pmc/core.h | 2 ++
drivers/platform/x86/intel/pmc/ptl.c | 30 +++++++++++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index d8c7b28493055..cdb32f2203cff 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -301,6 +301,8 @@ enum ppfear_regs {
#define PTL_PMC_LTR_CUR_ASLT 0x1C28
#define PTL_PMC_LTR_CUR_PLT 0x1C2C
#define PTL_PCD_PMC_MMIO_REG_LEN 0x31A8
+#define PTL_NUM_S0IX_BLOCKER 106
+#define PTL_BLK_REQ_OFFSET 55
/* SSRAM PMC Device ID */
/* LNL */
diff --git a/drivers/platform/x86/intel/pmc/ptl.c b/drivers/platform/x86/intel/pmc/ptl.c
index 394515af60d60..48be79b4e769f 100644
--- a/drivers/platform/x86/intel/pmc/ptl.c
+++ b/drivers/platform/x86/intel/pmc/ptl.c
@@ -10,6 +10,17 @@
#include "core.h"
+/* PMC SSRAM PMT Telemetry GUIDS */
+#define PCDP_LPM_REQ_GUID 0x47179370
+
+/*
+ * Die Mapping to Product.
+ * Product PCDDie
+ * PTL-H PCD-H
+ * PTL-P PCD-P
+ * PTL-U PCD-P
+ */
+
static const struct pmc_bit_map ptl_pcdp_pfear_map[] = {
{"PMC_0", BIT(0)},
{"FUSE_OSSE", BIT(1)},
@@ -515,6 +526,22 @@ static const struct pmc_reg_map ptl_pcdp_reg_map = {
.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
.s0ix_blocker_maps = ptl_pcdp_blk_maps,
.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+ .num_s0ix_blocker = PTL_NUM_S0IX_BLOCKER,
+ .blocker_req_offset = PTL_BLK_REQ_OFFSET,
+};
+
+static struct pmc_info ptl_pmc_info_list[] = {
+ {
+ .guid = PCDP_LPM_REQ_GUID,
+ .devid = PMC_DEVID_PTL_PCDH,
+ .map = &ptl_pcdp_reg_map,
+ },
+ {
+ .guid = PCDP_LPM_REQ_GUID,
+ .devid = PMC_DEVID_PTL_PCDP,
+ .map = &ptl_pcdp_reg_map,
+ },
+ {}
};
#define PTL_NPU_PCI_DEV 0xb03e
@@ -543,6 +570,9 @@ static int ptl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
}
struct pmc_dev_info ptl_pmc_dev = {
+ .pci_func = 2,
+ .telem_info = SUB_REQ_BLK,
+ .regmap_list = ptl_pmc_info_list,
.map = &ptl_pcdp_reg_map,
.suspend = cnl_suspend,
.resume = ptl_resume,
--
2.43.0
next prev parent reply other threads:[~2025-06-25 6:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 6:31 [PATCH v2 0/5] Enable SSRAM support in PTL and LNL Xi Pardee
2025-06-25 6:31 ` [PATCH v2 1/5] platform/x86:intel/pmc: Enable SSRAM support for Lunar Lake Xi Pardee
2025-06-30 11:25 ` Ilpo Järvinen
2025-06-25 6:31 ` [PATCH v2 2/5] platform/x86:intel/pmc: Move telemetry endpoint register handling Xi Pardee
2025-06-30 11:25 ` Ilpo Järvinen
2025-06-25 6:31 ` [PATCH v2 3/5] platform/x86:intel/pmc: Improve function to show substate header Xi Pardee
2025-06-30 11:34 ` Ilpo Järvinen
2025-06-30 17:35 ` Xi Pardee
2025-06-25 6:31 ` [PATCH v2 4/5] platform/x86:intel/pmc: Show substate requirement for S0ix blockers Xi Pardee
2025-06-26 16:38 ` Ilpo Järvinen
2025-06-26 21:16 ` Xi Pardee
2025-06-27 8:08 ` Ilpo Järvinen
2025-06-30 18:01 ` Xi Pardee
2025-06-25 6:31 ` Xi Pardee [this message]
2025-06-30 11:28 ` [PATCH v2 5/5] platform/x86:intel/pmc: Enable SSRAM support for Panther Lake Ilpo Järvinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250625063145.624585-6-xi.pardee@linux.intel.com \
--to=xi.pardee@linux.intel.com \
--cc=david.e.box@linux.intel.com \
--cc=hdegoede@redhat.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.