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From: Andrew Jones To: Jesse Taube Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Atish Patra , Anup Patel , Palmer Dabbelt , =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , Himanshu Chauhan , Charlie Jenkins Subject: Re: [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h Message-ID: <20250702-6b20245edf302791a48f98e1@orel> References: <20250605161806.1206850-1-jesse@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250605161806.1206850-1-jesse@rivosinc.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250702_074936_860938_9F0484FE X-CRM114-Status: GOOD ( 12.75 ) X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+kvm-riscv=archiver.kernel.org@lists.infradead.org On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote: > When handeling traps and faults it is offten necessary to know the size > of the instruction at epc. Add RV_INSN_LEN to calculate the > instruction size. > > Signed-off-by: Jesse Taube > --- > lib/riscv/asm/processor.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h > index 40104272..631ce226 100644 > --- a/lib/riscv/asm/processor.h > +++ b/lib/riscv/asm/processor.h > @@ -7,6 +7,8 @@ > #define EXCEPTION_CAUSE_MAX 24 > #define INTERRUPT_CAUSE_MAX 16 > > +#define RV_INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4) > + > typedef void (*exception_fn)(struct pt_regs *); > > struct thread_info { > -- > 2.43.0 Merged. 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From: Andrew Jones To: Jesse Taube Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Atish Patra , Anup Patel , Palmer Dabbelt , =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , Himanshu Chauhan , Charlie Jenkins Subject: Re: [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h Message-ID: <20250702-6b20245edf302791a48f98e1@orel> References: <20250605161806.1206850-1-jesse@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250605161806.1206850-1-jesse@rivosinc.com> X-Migadu-Flow: FLOW_OUT On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote: > When handeling traps and faults it is offten necessary to know the size > of the instruction at epc. Add RV_INSN_LEN to calculate the > instruction size. > > Signed-off-by: Jesse Taube > --- > lib/riscv/asm/processor.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h > index 40104272..631ce226 100644 > --- a/lib/riscv/asm/processor.h > +++ b/lib/riscv/asm/processor.h > @@ -7,6 +7,8 @@ > #define EXCEPTION_CAUSE_MAX 24 > #define INTERRUPT_CAUSE_MAX 16 > > +#define RV_INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4) > + > typedef void (*exception_fn)(struct pt_regs *); > > struct thread_info { > -- > 2.43.0 Merged. Thanks