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Fri, 04 Jul 2025 08:38:49 -0700 (PDT) Received: from localhost.localdomain ([103.97.166.196]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b38ee63003bsm2084818a12.62.2025.07.04.08.38.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jul 2025 08:38:49 -0700 (PDT) From: Anup Patel To: Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 0/2] Few timer and AIA fixes for KVM RISC-V Date: Fri, 4 Jul 2025 21:08:36 +0530 Message-ID: <20250704153838.6575-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250704_083850_880973_1BAB9438 X-CRM114-Status: UNSURE ( 9.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+kvm-riscv=archiver.kernel.org@lists.infradead.org The RISC-V Privileged specificaiton says the following: "WFI is also required to resume execution for locally enabled interrupts pending at any privilege level, regardless of the global interrupt enable at each privilege level." Based on the above, if there is pending VS-timer interrupt when the host (aka HS-mode) executes WFI then such a WFI will simply become NOP and not do anything. This result in QEMU RISC-V consuming a lot of CPU time on the x86 machine where it is running. The PATCH1 solves this issue by adding appropriate cleanup in KVM RISC-V timer virtualization. As a result PATCH1, race conditions in updating HGEI[E|P] CSRs when a VCPU is moved from one host CPU to another are being observed on QEMU so the PATCH2 tries to minimize the chances of these race conditions. Anup Patel (2): RISC-V: KVM: Disable vstimecmp before exiting to user-space RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization arch/riscv/include/asm/kvm_aia.h | 4 ++- arch/riscv/kvm/aia.c | 51 +++++--------------------------- arch/riscv/kvm/aia_imsic.c | 45 ++++++++++++++++++++++++++++ arch/riscv/kvm/vcpu.c | 2 -- arch/riscv/kvm/vcpu_timer.c | 16 ++++++++++ 5 files changed, 71 insertions(+), 47 deletions(-) -- 2.43.0 -- kvm-riscv mailing list kvm-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kvm-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AE2A16A956 for ; Fri, 4 Jul 2025 15:38:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.178 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 04 Jul 2025 08:38:49 -0700 (PDT) Received: from localhost.localdomain ([103.97.166.196]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b38ee63003bsm2084818a12.62.2025.07.04.08.38.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jul 2025 08:38:49 -0700 (PDT) From: Anup Patel To: Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 0/2] Few timer and AIA fixes for KVM RISC-V Date: Fri, 4 Jul 2025 21:08:36 +0530 Message-ID: <20250704153838.6575-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The RISC-V Privileged specificaiton says the following: "WFI is also required to resume execution for locally enabled interrupts pending at any privilege level, regardless of the global interrupt enable at each privilege level." Based on the above, if there is pending VS-timer interrupt when the host (aka HS-mode) executes WFI then such a WFI will simply become NOP and not do anything. This result in QEMU RISC-V consuming a lot of CPU time on the x86 machine where it is running. The PATCH1 solves this issue by adding appropriate cleanup in KVM RISC-V timer virtualization. As a result PATCH1, race conditions in updating HGEI[E|P] CSRs when a VCPU is moved from one host CPU to another are being observed on QEMU so the PATCH2 tries to minimize the chances of these race conditions. Anup Patel (2): RISC-V: KVM: Disable vstimecmp before exiting to user-space RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization arch/riscv/include/asm/kvm_aia.h | 4 ++- arch/riscv/kvm/aia.c | 51 +++++--------------------------- arch/riscv/kvm/aia_imsic.c | 45 ++++++++++++++++++++++++++++ arch/riscv/kvm/vcpu.c | 2 -- arch/riscv/kvm/vcpu_timer.c | 16 ++++++++++ 5 files changed, 71 insertions(+), 47 deletions(-) -- 2.43.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C73CDC8303D for ; Fri, 4 Jul 2025 15:40:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; 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Fri, 04 Jul 2025 08:38:49 -0700 (PDT) From: Anup Patel To: Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 0/2] Few timer and AIA fixes for KVM RISC-V Date: Fri, 4 Jul 2025 21:08:36 +0530 Message-ID: <20250704153838.6575-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250704_083850_871901_5FD8ED04 X-CRM114-Status: UNSURE ( 9.86 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The RISC-V Privileged specificaiton says the following: "WFI is also required to resume execution for locally enabled interrupts pending at any privilege level, regardless of the global interrupt enable at each privilege level." Based on the above, if there is pending VS-timer interrupt when the host (aka HS-mode) executes WFI then such a WFI will simply become NOP and not do anything. This result in QEMU RISC-V consuming a lot of CPU time on the x86 machine where it is running. The PATCH1 solves this issue by adding appropriate cleanup in KVM RISC-V timer virtualization. As a result PATCH1, race conditions in updating HGEI[E|P] CSRs when a VCPU is moved from one host CPU to another are being observed on QEMU so the PATCH2 tries to minimize the chances of these race conditions. Anup Patel (2): RISC-V: KVM: Disable vstimecmp before exiting to user-space RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization arch/riscv/include/asm/kvm_aia.h | 4 ++- arch/riscv/kvm/aia.c | 51 +++++--------------------------- arch/riscv/kvm/aia_imsic.c | 45 ++++++++++++++++++++++++++++ arch/riscv/kvm/vcpu.c | 2 -- arch/riscv/kvm/vcpu_timer.c | 16 ++++++++++ 5 files changed, 71 insertions(+), 47 deletions(-) -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv