Re: [PATCH 5.15-stable] x86/CPU/AMD: Properly check the TSA microcode

[Greg KH <gregkh@linuxfoundation.org>]

On Fri, Jul 11, 2025 at 09:45:58PM +0200, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> Date: Fri, 11 Jul 2025 17:40:18 +0200
> 
> In order to simplify backports, I resorted to an older version of the
> microcode revision checking which didn't pull in the whole struct
> x86_cpu_id matching machinery.
> 
> My simpler method, however, forgot to add the extended CPU model to the
> patch revision, which lead to mismatches when determining whether TSA
> mitigation support is present.
> 
> So add that forgotten extended model.
> 
> Also, fix a backport mismerge which put tsa_init() where it doesn't
> belong.
> 
> This is a stable-only fix and the preference is to do it this way
> because it is a lot simpler. Also, the Fixes: tag below points to the
> respective stable patch.
> 
> Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation")
> Reported-by: Thomas Voegtle <tv@lio96.de>
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> Tested-by: Thomas Voegtle <tv@lio96.de>
> Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de>
> ---
>  arch/x86/kernel/cpu/amd.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

All now queued up, thanks.

greg k-h