From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Tiezhu Yang <yangtiezhu@loongson.cn>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/2] net: stmmac: Return early if invalid in loongson_dwmac_fix_reset()
Date: Tue, 22 Jul 2025 14:48:02 +0200 [thread overview]
Message-ID: <20250722144802.637bfde0@fedora.home> (raw)
In-Reply-To: <20250722062716.29590-2-yangtiezhu@loongson.cn>
On Tue, 22 Jul 2025 14:27:15 +0800
Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> If the DMA_BUS_MODE_SFT_RESET bit is 1 before software reset,
> there is no need to do anything for this abnormal case, just
> return -EINVAL immediately in loongson_dwmac_fix_reset().
>
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Do you know when that could ever happen ? I'm asking because this logic
for the DMA reset is duplicated in several places in this driver, maybe
this could be useful for other users as well. I'm guessing this is to
avoid waiting for the timeout when the DMA reset fails, but that is
usually when there's a missing clock somewhere (such as the RGMII clock
from the PHY), in which case I don't think the RST bit will be set.
Maxime
next prev parent reply other threads:[~2025-07-22 12:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-22 6:27 [PATCH net-next 0/2] Refine stmmac code Tiezhu Yang
2025-07-22 6:27 ` [PATCH net-next 1/2] net: stmmac: Return early if invalid in loongson_dwmac_fix_reset() Tiezhu Yang
2025-07-22 12:48 ` Maxime Chevallier [this message]
2025-07-22 13:10 ` Tiezhu Yang
2025-07-23 9:42 ` Tiezhu Yang
2025-07-22 6:27 ` [PATCH net-next 2/2] net: stmmac: Check stmmac_hw_setup() in stmmac_resume() Tiezhu Yang
2025-07-22 12:44 ` Maxime Chevallier
2025-07-23 7:57 ` Huacai Chen
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