From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F15602BE638; Thu, 31 Jul 2025 11:05:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753959936; cv=none; b=ILUvEOfiIZD9AFdNOobdsxwAmC/N0f8PDPIkvro5fxCzNDCG16+ZJLvbqxUkEMRfJYNtV5tDvQ6blmqqeOZM7YCesZvlVntCIhdRaeFN8M77jtJP9I72a+gVopDO/IWjsZBZLijayB4w6L4Aoa2nDDYWHQjGielxjCBSNHx6pek= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753959936; c=relaxed/simple; bh=mVFM8r5cDdwWpwJcXn1oc0Z2uTdcDftzKnpKjrOM2SI=; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dov+1ZJbeEzNUYHvyJmRrmY93nlU9JRtV4RltcRA5NjkHUFRTovje+4p0b/JETcp0ORFQVFd1Y8/911eUMJDVsXxwOeq8B7xZcf5mJivZr/weK2b+BG1F/FDjMrf4L/Gm4B+j4LRI0npbohEo4nO7wHbx1kLpmEDpfMkJDw3SqE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4bt5mg3ZLkz6D9QX; Thu, 31 Jul 2025 19:03:47 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id D7A1E140133; Thu, 31 Jul 2025 19:05:24 +0800 (CST) Received: from localhost (10.203.177.66) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 31 Jul 2025 13:05:23 +0200 Date: Thu, 31 Jul 2025 12:05:22 +0100 From: Jonathan Cameron To: AngeloGioacchino Del Regno CC: , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 1/7] spmi: Implement spmi_subdevice_alloc_and_add() and devm variant Message-ID: <20250731120522.00001005@huawei.com> In-Reply-To: <20250730112645.542179-2-angelogioacchino.delregno@collabora.com> References: <20250730112645.542179-1-angelogioacchino.delregno@collabora.com> <20250730112645.542179-2-angelogioacchino.delregno@collabora.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: lhrpeml500010.china.huawei.com (7.191.174.240) To frapeml500008.china.huawei.com (7.182.85.71) On Wed, 30 Jul 2025 13:26:39 +0200 AngeloGioacchino Del Regno wrote: > Some devices connected over the SPMI bus may be big, in the sense > that those may be a complex of devices managed by a single chip > over the SPMI bus, reachable through a single SID. > > Add new functions aimed at managing sub-devices of a SPMI device > spmi_subdevice_alloc_and_add() and a spmi_subdevice_put_and_remove() > for adding a new subdevice and removing it respectively, and also > add their devm_* variants. > > The need for such functions comes from the existance of those > complex Power Management ICs (PMICs), which feature one or many > sub-devices, in some cases with these being even addressable on > the chip in form of SPMI register ranges. > > Examples of those devices can be found in both Qualcomm platforms > with their PMICs having PON, RTC, SDAM, GPIO controller, and other > sub-devices, and in newer MediaTek platforms showing similar HW > features and a similar layout with those also having many subdevs. > > Also, instead of generally exporting symbols, export them with a > new "SPMI" namespace: all users will have to import this namespace > to make use of the newly introduced exports. > > Link: https://lore.kernel.org/r/20250722101317.76729-2-angelogioacchino.delregno@collabora.com > Signed-off-by: AngeloGioacchino Del Regno With the note that I know almost nothing about SPMI so am just looking at what is here + replies in earlier threads. Looks good to me. Reviewed-by: Jonathan Cameron From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 813B7C87FCC for ; Thu, 31 Jul 2025 11:07:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ckE9ATq5kFN3EwgiC2fR3xXb7Tfqod7WJjfizF4fbiI=; b=PNpB2SFEgw2fSu xQ8xMe/tRaso/DtJkTQuUeRlOskT7CdNaZd+ZkVrIiTEM5fwVQSl88gJapX8HX6/p3iUV5n46caXF diSC/RmhSWCA5/XgwqeAVE3Yb5sXtk4H2p9ZL0Pw8yxD5qub+o67/VlCpnlOT/8ZhivDX+WiLZvQe C0ATXR/CV8bJTD2X399XTs+sos/6vzkPjUY74t+y3f2eBITMKqnQB2F0rp2zn4QPv37oGfz3M3M8u 9rIX9YinT90CLjbO0ZMHhvY0Z1GlEirw1raJo3f0OS1evmbtbRvlAX0zHyQxyDUrixRXmiAvnSAaN aEqx7O9zbmp/3EU6LK+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uhR8f-00000003SYM-0pzQ; Thu, 31 Jul 2025 11:07:57 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uhR6O-00000003SKh-3bEY for linux-phy@lists.infradead.org; Thu, 31 Jul 2025 11:05:38 +0000 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4bt5mg3ZLkz6D9QX; Thu, 31 Jul 2025 19:03:47 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id D7A1E140133; Thu, 31 Jul 2025 19:05:24 +0800 (CST) Received: from localhost (10.203.177.66) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 31 Jul 2025 13:05:23 +0200 Date: Thu, 31 Jul 2025 12:05:22 +0100 From: Jonathan Cameron To: AngeloGioacchino Del Regno CC: , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 1/7] spmi: Implement spmi_subdevice_alloc_and_add() and devm variant Message-ID: <20250731120522.00001005@huawei.com> In-Reply-To: <20250730112645.542179-2-angelogioacchino.delregno@collabora.com> References: <20250730112645.542179-1-angelogioacchino.delregno@collabora.com> <20250730112645.542179-2-angelogioacchino.delregno@collabora.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.203.177.66] X-ClientProxiedBy: lhrpeml500010.china.huawei.com (7.191.174.240) To frapeml500008.china.huawei.com (7.182.85.71) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250731_040537_052217_372A34B4 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Wed, 30 Jul 2025 13:26:39 +0200 AngeloGioacchino Del Regno wrote: > Some devices connected over the SPMI bus may be big, in the sense > that those may be a complex of devices managed by a single chip > over the SPMI bus, reachable through a single SID. > > Add new functions aimed at managing sub-devices of a SPMI device > spmi_subdevice_alloc_and_add() and a spmi_subdevice_put_and_remove() > for adding a new subdevice and removing it respectively, and also > add their devm_* variants. > > The need for such functions comes from the existance of those > complex Power Management ICs (PMICs), which feature one or many > sub-devices, in some cases with these being even addressable on > the chip in form of SPMI register ranges. > > Examples of those devices can be found in both Qualcomm platforms > with their PMICs having PON, RTC, SDAM, GPIO controller, and other > sub-devices, and in newer MediaTek platforms showing similar HW > features and a similar layout with those also having many subdevs. > > Also, instead of generally exporting symbols, export them with a > new "SPMI" namespace: all users will have to import this namespace > to make use of the newly introduced exports. > > Link: https://lore.kernel.org/r/20250722101317.76729-2-angelogioacchino.delregno@collabora.com > Signed-off-by: AngeloGioacchino Del Regno With the note that I know almost nothing about SPMI so am just looking at what is here + replies in earlier threads. Looks good to me. Reviewed-by: Jonathan Cameron -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy