From: John Allen <john.allen@amd.com>
To: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
<dave.hansen@intel.com>
Cc: <rick.p.edgecombe@intel.com>, <mlevitsk@redhat.com>,
<weijiang.yang@intel.com>, <chao.gao@intel.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<thomas.lendacky@amd.com>, John Allen <john.allen@amd.com>
Subject: [PATCH v3 1/5] KVM: x86: SVM: Emulate reads and writes to shadow stack MSRs
Date: Wed, 6 Aug 2025 20:45:06 +0000 [thread overview]
Message-ID: <20250806204510.59083-2-john.allen@amd.com> (raw)
In-Reply-To: <20250806204510.59083-1-john.allen@amd.com>
Set up interception of shadow stack MSRs. In the event that shadow stack
is unsupported on the host or the MSRs are otherwise inaccessible, the
interception code will return an error. In certain circumstances such as
host initiated MSR reads or writes, the interception code will get or
set the requested MSR value.
Signed-off-by: John Allen <john.allen@amd.com>
---
arch/x86/kvm/svm/svm.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 6375695ce285..d4e27e70b926 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -2776,6 +2776,15 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
if (guest_cpuid_is_intel_compatible(vcpu))
msr_info->data |= (u64)svm->sysenter_esp_hi << 32;
break;
+ case MSR_IA32_S_CET:
+ msr_info->data = svm->vmcb->save.s_cet;
+ break;
+ case MSR_IA32_INT_SSP_TAB:
+ msr_info->data = svm->vmcb->save.isst_addr;
+ break;
+ case MSR_KVM_INTERNAL_GUEST_SSP:
+ msr_info->data = svm->vmcb->save.ssp;
+ break;
case MSR_TSC_AUX:
msr_info->data = svm->tsc_aux;
break;
@@ -3008,6 +3017,15 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
svm->vmcb01.ptr->save.sysenter_esp = (u32)data;
svm->sysenter_esp_hi = guest_cpuid_is_intel_compatible(vcpu) ? (data >> 32) : 0;
break;
+ case MSR_IA32_S_CET:
+ svm->vmcb->save.s_cet = data;
+ break;
+ case MSR_IA32_INT_SSP_TAB:
+ svm->vmcb->save.isst_addr = data;
+ break;
+ case MSR_KVM_INTERNAL_GUEST_SSP:
+ svm->vmcb->save.ssp = data;
+ break;
case MSR_TSC_AUX:
/*
* TSC_AUX is always virtualized for SEV-ES guests when the
--
2.34.1
next prev parent reply other threads:[~2025-08-06 20:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 20:45 [PATCH v3 0/5] Enable Shadow Stack Virtualization for SVM John Allen
2025-08-06 20:45 ` John Allen [this message]
2025-08-25 1:27 ` [PATCH v3 1/5] KVM: x86: SVM: Emulate reads and writes to shadow stack MSRs Chao Gao
2025-08-06 20:45 ` [PATCH v3 2/5] KVM: x86: SVM: Update dump_vmcb with shadow stack save area additions John Allen
2025-08-22 20:57 ` Tom Lendacky
2025-08-06 20:45 ` [PATCH v3 3/5] KVM: x86: SVM: Pass through shadow stack MSRs John Allen
2025-08-25 1:21 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 4/5] KVM: SVM: Add MSR_IA32_XSS to the GHCB for hypervisor kernel John Allen
2025-08-25 1:46 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 5/5] KVM: SVM: Enable shadow stack virtualization for SVM John Allen
2025-08-25 1:33 ` Chao Gao
2025-09-03 21:01 ` John Allen
2025-09-05 20:50 ` Chao Gao
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