Re: [PATCH v1 04/10] PCI/P2PDMA: Refactor to separate core P2P functionality from memory allocation

[Jason Gunthorpe <jgg@nvidia.com>]

On Wed, Aug 06, 2025 at 03:42:14PM -0600, Alex Williamson wrote:
> > +	p2p->mem.owner = &pdev->dev;
> > +	/* On all p2p platforms bus_offset is the same for all BARs */
> > +	p2p->mem.bus_offset =
> > +		pci_bus_address(pdev, 0) - pci_resource_start(pdev, 0);
> 
> But not all devices implement BAR0, nor is BAR0 necessarily in the
> memory space, wouldn't this calculation be wrong if BAR0 were
> unimplemented or an IO BAR?  

I think you are correct about this.

> Even within memory BARs I can imagine different translations for 32
> vs 64 bit, prefetch vs non-prefetch, but per the comment I guess
> we're excluding those.  Thanks,

Humm, I had thought it was consistent for the device, but I guess not:

	resource_list_for_each_entry(window, &bridge->windows) {
		if (resource_contains(window->res, res)) {
			offset = window->offset;

Seems like each window can have its own offset.

So the p2p should be made per-bar, and hold the bar index from the
constructor..

Jason