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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-459dcb86d6asm311891055e9.5.2025.08.11.10.07.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 11 Aug 2025 10:07:07 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Miguel Luis , Richard Henderson , kvm@vger.kernel.org, Peter Maydell , Paolo Bonzini , Haibo Xu , Mohamed Mediouni , Mark Burton , Alexander Graf , Claudio Fontana , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Mads Ynddal , Eric Auger , qemu-arm@nongnu.org, Cameron Esfahani , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 10/11] target/arm/hvf: Consider EL2 acceleration for Silicon M3+ chipsets Date: Mon, 11 Aug 2025 19:06:10 +0200 Message-ID: <20250811170611.37482-11-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250811170611.37482-1-philmd@linaro.org> References: <20250811170611.37482-1-philmd@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé --- Just a proof-of-concept... --- target/arm/hvf/hvf.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 778dc3cedf7..d74f576b103 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1000,6 +1000,9 @@ uint32_t hvf_arm_get_max_ipa_bit_size(void) bool arm_hw_accel_cpu_feature_supported(enum arm_features feat, bool can_emulate) { + hv_return_t ret; + bool supported; + if (!hvf_enabled()) { return false; } @@ -1011,6 +1014,9 @@ bool arm_hw_accel_cpu_feature_supported(enum arm_features feat, bool can_emulate case ARM_FEATURE_GENERIC_TIMER: return true; case ARM_FEATURE_EL2: + ret = hv_vm_config_get_el2_supported(&supported); + assert_hvf_ok(ret); + return supported; case ARM_FEATURE_EL3: return false; default: -- 2.49.0