From: Herve Codina <herve.codina@bootlin.com>
To: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Qiang Zhao <qiang.zhao@nxp.com>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org
Subject: Re: [PATCH v2 1/4] soc: fsl: qmc: Only set completion interrupt when needed
Date: Thu, 14 Aug 2025 09:34:43 +0200 [thread overview]
Message-ID: <20250814093443.1506b49f@bootlin.com> (raw)
In-Reply-To: <20250813120651.27dc8467@bootlin.com>
Hi Christophe,
On Wed, 13 Aug 2025 12:06:51 +0200
Herve Codina <herve.codina@bootlin.com> wrote:
> Hi Christophe,
>
> On Tue, 12 Aug 2025 12:50:55 +0200
> Christophe Leroy <christophe.leroy@csgroup.eu> wrote:
>
> > When no post-completion processing is expected, don't waste time
> > handling useless interrupts.
> >
> > Only set QMC_BD_[R/T]X_I when a completion function is passed in,
> > and perform seamless completion on submit for interruptless buffers.
> >
> > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> > ---
> > v2: Keep the UB flag to mark not completed buffers and seamlessly flag them as completed during next submit.
> > ---
> > drivers/soc/fsl/qe/qmc.c | 44 ++++++++++++++++++++++++++++++----------
> > 1 file changed, 33 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
> > index 36c0ccc06151f..8f76b9a5e385d 100644
> > --- a/drivers/soc/fsl/qe/qmc.c
> > +++ b/drivers/soc/fsl/qe/qmc.c
> > @@ -461,9 +461,16 @@ int qmc_chan_write_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
> >
> > ctrl = qmc_read16(&bd->cbd_sc);
> > if (ctrl & (QMC_BD_TX_R | QMC_BD_TX_UB)) {
> > - /* We are full ... */
> > - ret = -EBUSY;
> > - goto end;
> > + if (!(ctrl & QMC_BD_TX_I) && bd == chan->txbd_done) {
> > + if (ctrl & QMC_BD_TX_W)
> > + chan->txbd_done = chan->txbds;
> > + else
> > + chan->txbd_done++;
> > + } else {
> > + /* We are full ... */
> > + ret = -EBUSY;
> > + goto end;
> > + }
> > }
> >
> > qmc_write16(&bd->cbd_datlen, length);
> > @@ -475,6 +482,10 @@ int qmc_chan_write_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
> >
> > /* Activate the descriptor */
> > ctrl |= (QMC_BD_TX_R | QMC_BD_TX_UB);
> > + if (complete)
> > + ctrl |= QMC_BD_TX_I;
> > + else
> > + ctrl &= ~QMC_BD_TX_I;
> > wmb(); /* Be sure to flush the descriptor before control update */
> > qmc_write16(&bd->cbd_sc, ctrl);
> >
>
> You try to purge one descriptor for which the transfer is done but you do that
> when you have no more free descriptors.
>
> You end up with all descriptor "used". I think a better way to do that is
> to purge all "done" descriptor configured to work without interrupts until a
> descriptor with interrupt is found.
I have looked again at your code and looking for a free descriptor only when it
is needed is sufficient. You can forget my previous proposal.
Back to your code, I think you need to be sure that the descriptor you want to
re-use is really available and so you need to check the 'R' bit to be sure
that we are not with 'R' = 1 and 'UB' = 1 which means "BD is used, waiting for
a transfer".
For instance:
if (ctrl & (QMC_BD_TX_R | QMC_BD_TX_UB)) {
if (!(ctrl & (QMC_BD_TX_I | QMC_BD_TX_R) &&
bd == chan->txbd_done) {
if (ctrl & QMC_BD_TX_W)
chan->txbd_done = chan->txbds;
else
chan->txbd_done++;
} else {
/* We are full ... */
ret = -EBUSY;
goto end;
}
}
Best regards,
Hervé
next prev parent reply other threads:[~2025-08-14 7:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 10:50 [PATCH v2 0/4] ASoC: fsl: fsl_qmc_audio: Reduce amount of interrupts Christophe Leroy
2025-08-12 10:50 ` [PATCH v2 1/4] soc: fsl: qmc: Only set completion interrupt when needed Christophe Leroy
2025-08-13 10:06 ` Herve Codina
2025-08-14 7:34 ` Herve Codina [this message]
2025-08-18 8:16 ` Christophe Leroy
2025-08-12 10:50 ` [PATCH v2 2/4] ASoc: fsl: fsl_qmc_audio: Ensure audio channels are ordered in TDM bus Christophe Leroy
2025-08-13 10:06 ` Herve Codina
2025-08-18 8:18 ` Christophe Leroy
2025-08-13 17:16 ` kernel test robot
2025-08-14 7:45 ` Herve Codina
2025-08-18 8:18 ` Christophe Leroy
2025-08-12 10:50 ` [PATCH v2 3/4] ASoC: fsl: fsl_qmc_audio: Only request completion on last channel Christophe Leroy
2025-08-13 10:07 ` Herve Codina
2025-08-12 10:50 ` [PATCH v2 4/4] ASoc: fsl: fsl_qmc_audio: Drop struct qmc_dai_chan Christophe Leroy
2025-08-13 10:07 ` Herve Codina
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