From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFD86393DD1; Tue, 26 Aug 2025 11:44:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756208678; cv=none; b=V/Rr6nxOctq3v8C5LbE1quJJiBJeDsVnQbguygV+7dtVBkD3UvhfrQAn41k5yt1+I4Pe/HZePkjOngzKkQxepP/+oI/hofophHbmXI6bsKZzRg+ZcDny7215rrtgc/C6/Z4xDfwdud7Ms6EZi4FC8wjfJpGoTn2ZY7cBNM3nfe4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756208678; c=relaxed/simple; bh=ClVYT/+zUHrMDaHmVp77iJ21ziy5cExuFUMhCqNbkRQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=H5po+NoDNRwZe25rNan80YlQ3fEYPAw9z6IiBQ9578xjS91lAZSWwZ0hQltMt8ufzzvkB1O6Un8tbi1ZAa1lsWOvnp/18w/qtQdJIr0SgfuKI3n277lCTysmmlZ33AroWL2f74X1QRxA4/FDfdH28CuSbZRP5+Fe4O3qGhlmpGo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=cTmQZnTe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="cTmQZnTe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4C5DBC4CEF4; Tue, 26 Aug 2025 11:44:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1756208678; bh=ClVYT/+zUHrMDaHmVp77iJ21ziy5cExuFUMhCqNbkRQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cTmQZnTeBY2PLK90KkEuMu6Y0mLCoLi6tAzXD2n2FcROPj1+MI7ekEsyeizcgbdNm SmzUGD9Qk8IzF4MhIcPameJAUdrYtun0QUTtcRIolL5rt/uLJY+R50gkpSESCNJXU9 PGS+2qDeZY2T7rqbaN9EOuSqFv3S7LY3qJJWOjyk= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Judith Mendez , Moteen Shah , Nishanth Menon , Sasha Levin Subject: [PATCH 6.12 202/322] arm64: dts: ti: k3-am6*: Add boot phase flag to support MMC boot Date: Tue, 26 Aug 2025 13:10:17 +0200 Message-ID: <20250826110920.856325549@linuxfoundation.org> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250826110915.169062587@linuxfoundation.org> References: <20250826110915.169062587@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Judith Mendez [ Upstream commit db3cd905b8c8cd40f15a34e30a225704bb8a2fcb ] The bootph-all flag was introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. For eMMC and SD boot modes, voltage regulator nodes, io-expander nodes, gpio nodes, and MMC nodes need to be present in all boot stages, so add missing bootph-all phase flag to these nodes to support SD boot and eMMC boot. Signed-off-by: Judith Mendez Reviewed-by: Moteen Shah Link: https://lore.kernel.org/r/20250429151454.4160506-2-jm@ti.com Signed-off-by: Nishanth Menon Stable-dep-of: a0b8da04153e ("arm64: dts: ti: k3-am62*: Move eMMC pinmux to top level board file") Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 ++ 2 files changed, 14 insertions(+) --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -69,6 +69,7 @@ gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; + bootph-all; }; }; @@ -77,12 +78,14 @@ pinctrl-single,pins = < AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ >; + bootph-all; }; main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (C13) UART0_RTSn.GPIO1_23 */ >; + bootph-all; }; pmic_irq_pins_default: pmic-irq-default-pins { @@ -118,6 +121,7 @@ pinctrl-names = "default"; pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; + bootph-all; }; exp2: gpio@23 { @@ -229,6 +233,14 @@ DVDD-supply = <&buck2_reg>; }; +&main_gpio0 { + bootph-all; +}; + +&main_gpio1 { + bootph-all; +}; + &gpmc0 { ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */ }; --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -301,6 +301,7 @@ AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ >; + bootph-all; }; main_mmc1_pins_default: main-mmc1-default-pins { @@ -603,6 +604,7 @@ pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; disable-wp; + bootph-all; }; &sdhci1 {