Re: [PATCH v2 1/4] hw/acpi: Increase the number of possible ACPI interrupts

[Igor Mammedov <imammedo@redhat.com>]

On Thu, 21 Aug 2025 20:45:49 +0300
Leonid Bloch <lb.workbox@gmail.com> wrote:

> Increase the number of possible ACPI interrupts from 8, to the maximum
> available: 64 by default.

for piix4 we have 'GPE_LEN 4', which gives us 2 bitmaps (STS/EN) 16bit each.
For ICH9_PMIO_GPE0_LEN 16 => 8bytes/bitmap

so numbers above would vary on used machine type

also commit message should mention why this is needed.

> 
> Signed-off-by: Leonid Bloch <lb.workbox@gmail.com>
> ---
>  hw/acpi/core.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/acpi/core.c b/hw/acpi/core.c
> index 58f8964e13..447ff07878 100644
> --- a/hw/acpi/core.c
> +++ b/hw/acpi/core.c
> @@ -729,19 +729,32 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
>  void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
>                           AcpiEventStatusBits status)
>  {
> -    ar->gpe.sts[0] |= status;
> +    int i;
> +
> +    AcpiEventStatusBits st = status;
newline here and remove newline above

> +    for (i = 0; i < ar->gpe.len / 2; i++) {
> +        ar->gpe.sts[i] |= st;
> +        st >>= (sizeof(ar->gpe.sts[0]) * CHAR_BIT);
                perhaps use TYPE_WIDTH()

> +    }
>
>      acpi_update_sci(ar, irq);
>  }
>  
>  void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
>  {
>      int sci_level, pm1a_sts;
> +    uint64_t gpe_sci = 0;
> +    int i;
>  
>      pm1a_sts = acpi_pm1_evt_get_sts(regs);
>  
> +    for (i = 0; i < regs->gpe.len / 2; i++) {
> +        gpe_sci |= (regs->gpe.sts[i] & regs->gpe.en[i]);
           ^^^
           make it bool and then !!(regs->gpe.sts[i] & regs->gpe.en[i])

> +    }


or maybe instead of opencoding bitmaps, use bitmap API from bitops.h

>      sci_level = ((pm1a_sts &
>                    regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
> -                ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
> +                (gpe_sci != 0);
>  
>      qemu_set_irq(irq, sci_level);
>