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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Michael Jeanson <mjeanson@efficios.com>,
	Jens Axboe <axboe@kernel.dk>,
	Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
	Peter Zijlstra <peterz@infradead.org>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Boqun Feng <boqun.feng@gmail.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	Wei Liu <wei.liu@kernel.org>, Dexuan Cui <decui@microsoft.com>,
	x86@kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Heiko Carstens <hca@linux.ibm.com>,
	Christian Borntraeger <borntraeger@linux.ibm.com>,
	Sven Schnelle <svens@linux.ibm.com>,
	Huacai Chen <chenhuacai@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: [patch V3 14/37] rseq: Cache CPU ID and MM CID values
Date: Fri,  5 Sep 2025 00:21:00 +0200 (CEST)	[thread overview]
Message-ID: <20250904185720.024147389@linutronix.de> (raw)
In-Reply-To: 20250904185336.943880027@linutronix.de

In preparation for rewriting RSEQ exit to user space handling provide
storage to cache the CPU ID and MM CID values which were written to user
space. That prepares for a quick check, which avoids the update when
nothing changed.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

---
 include/linux/rseq.h        |    3 +++
 include/linux/rseq_types.h  |   19 +++++++++++++++++++
 include/linux/sched.h       |    1 +
 include/trace/events/rseq.h |    4 ++--
 kernel/rseq.c               |    4 ++++
 5 files changed, 29 insertions(+), 2 deletions(-)

--- a/include/linux/rseq.h
+++ b/include/linux/rseq.h
@@ -64,11 +64,13 @@ static inline void rseq_fork(struct task
 		t->rseq = NULL;
 		t->rseq_len = 0;
 		t->rseq_sig = 0;
+		t->rseq_ids.cpu_cid = ~0ULL;
 		t->rseq_event.all = 0;
 	} else {
 		t->rseq = current->rseq;
 		t->rseq_len = current->rseq_len;
 		t->rseq_sig = current->rseq_sig;
+		t->rseq_ids.cpu_cid = ~0ULL;
 		t->rseq_event = current->rseq_event;
 	}
 }
@@ -78,6 +80,7 @@ static inline void rseq_execve(struct ta
 	t->rseq = NULL;
 	t->rseq_len = 0;
 	t->rseq_sig = 0;
+	t->rseq_ids.cpu_cid = ~0ULL;
 	t->rseq_event.all = 0;
 }
 
--- a/include/linux/rseq_types.h
+++ b/include/linux/rseq_types.h
@@ -27,4 +27,23 @@ struct rseq_event {
 	};
 };
 
+/*
+ * struct rseq_ids - Cache for ids, which need to be updated
+ * @cpu_cid:	Compound of @cpu_id and @mm_cid to make the
+ *		compiler emit a single compare on 64-bit
+ * @cpu_id:	The CPU ID which was written last to user space
+ * @mm_cid:	The MM CID which was written last to user space
+ *
+ * @cpu_id and @mm_cid are updated when the data is written to user space.
+ */
+struct rseq_ids {
+	union {
+		u64		cpu_cid;
+		struct {
+			u32	cpu_id;
+			u32	mm_cid;
+		};
+	};
+};
+
 #endif
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1406,6 +1406,7 @@ struct task_struct {
 	u32				rseq_len;
 	u32				rseq_sig;
 	struct rseq_event		rseq_event;
+	struct rseq_ids			rseq_ids;
 # ifdef CONFIG_DEBUG_RSEQ
 	/*
 	 * This is a place holder to save a copy of the rseq fields for
--- a/include/trace/events/rseq.h
+++ b/include/trace/events/rseq.h
@@ -21,9 +21,9 @@ TRACE_EVENT(rseq_update,
 	),
 
 	TP_fast_assign(
-		__entry->cpu_id = raw_smp_processor_id();
+		__entry->cpu_id = t->rseq_ids.cpu_id;
 		__entry->node_id = cpu_to_node(__entry->cpu_id);
-		__entry->mm_cid = task_mm_cid(t);
+		__entry->mm_cid = t->rseq_ids.mm_cid;
 	),
 
 	TP_printk("cpu_id=%d node_id=%d mm_cid=%d", __entry->cpu_id,
--- a/kernel/rseq.c
+++ b/kernel/rseq.c
@@ -184,6 +184,10 @@ static int rseq_update_cpu_node_id(struc
 	rseq_unsafe_put_user(t, node_id, node_id, efault_end);
 	rseq_unsafe_put_user(t, mm_cid, mm_cid, efault_end);
 
+	/* Cache the user space values */
+	t->rseq_ids.cpu_id = cpu_id;
+	t->rseq_ids.mm_cid = mm_cid;
+
 	/*
 	 * Additional feature fields added after ORIG_RSEQ_SIZE
 	 * need to be conditionally updated only if



  parent reply	other threads:[~2025-09-04 22:21 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04 22:20 [patch V3 00/37] rseq: Optimize exit to user space Thomas Gleixner
2025-09-04 22:20 ` [patch V3 01/37] rseq: Avoid pointless evaluation in __rseq_notify_resume() Thomas Gleixner
2025-09-04 22:20 ` [patch V3 02/37] rseq: Condense the inline stubs Thomas Gleixner
2025-09-04 22:20 ` [patch V3 03/37] rseq: Move algorithm comment to top Thomas Gleixner
2025-09-04 22:20 ` [patch V3 04/37] rseq: Remove the ksig argument from rseq_handle_notify_resume() Thomas Gleixner
2025-09-04 22:20 ` [patch V3 05/37] rseq: Simplify registration Thomas Gleixner
2025-09-04 22:20 ` [patch V3 06/37] rseq: Simplify the event notification Thomas Gleixner
2025-09-04 22:20 ` [patch V3 07/37] rseq, virt: Retrigger RSEQ after vcpu_run() Thomas Gleixner
2025-09-04 22:20 ` [patch V3 08/37] rseq: Avoid CPU/MM CID updates when no event pending Thomas Gleixner
2025-09-04 22:20 ` [patch V3 09/37] rseq: Introduce struct rseq_event Thomas Gleixner
2025-09-04 22:20 ` [patch V3 10/37] entry: Cleanup header Thomas Gleixner
2025-09-04 22:20 ` [patch V3 11/37] entry: Remove syscall_enter_from_user_mode_prepare() Thomas Gleixner
2025-09-04 22:20 ` [patch V3 12/37] entry: Inline irqentry_enter/exit_from/to_user_mode() Thomas Gleixner
2025-09-04 22:20 ` [patch V3 13/37] sched: Move MM CID related functions to sched.h Thomas Gleixner
2025-09-04 22:21 ` Thomas Gleixner [this message]
2025-09-04 22:21 ` [patch V3 15/37] rseq: Record interrupt from user space Thomas Gleixner
2025-09-04 22:21 ` [patch V3 16/37] From: Thomas Gleixner <tglx@linutronix.de> 65;7006;1cSubject: rseq: Provide tracepoint wrappers for inline code Date: Sat, 23 Aug 2025 18:39:45 +0200 Thomas Gleixner
2025-09-04 22:37   ` Mathieu Desnoyers
2025-09-04 22:40   ` [patch V3 RESEND 16/37] rseq: Provide tracepoint wrappers for inline code Thomas Gleixner
2025-09-04 22:21 ` [patch V3 17/37] rseq: Expose lightweight statistics in debugfs Thomas Gleixner
2025-09-04 22:21 ` [patch V3 18/37] rseq: Provide static branch for runtime debugging Thomas Gleixner
2025-09-04 22:21 ` [patch V3 19/37] rseq: Provide and use rseq_update_user_cs() Thomas Gleixner
2025-09-04 22:21 ` [patch V3 20/37] rseq: Replace the original debug implementation Thomas Gleixner
2025-09-04 22:21 ` [patch V3 21/37] rseq: Make exit debugging static branch based Thomas Gleixner
2025-09-04 22:21 ` [patch V3 22/37] rseq: Use static branch for syscall exit debug when GENERIC_IRQ_ENTRY=y Thomas Gleixner
2025-09-04 22:21 ` [patch V3 23/37] rseq: Provide and use rseq_set_ids() Thomas Gleixner
2025-09-04 22:21 ` [patch V3 24/37] rseq: Separate the signal delivery path Thomas Gleixner
2025-09-04 22:21 ` [patch V3 25/37] rseq: Rework the TIF_NOTIFY handler Thomas Gleixner
2025-09-04 22:21 ` [patch V3 26/37] rseq: Optimize event setting Thomas Gleixner
2025-09-04 22:21 ` [patch V3 27/37] rseq: Implement fast path for exit to user Thomas Gleixner
2025-09-04 22:21 ` [patch V3 28/37] rseq: Switch to fast path processing on " Thomas Gleixner
2025-09-04 22:21 ` [patch V3 29/37] entry: Split up exit_to_user_mode_prepare() Thomas Gleixner
2025-09-04 22:21 ` [patch V3 30/37] rseq: Split up rseq_exit_to_user_mode() Thomas Gleixner
2025-09-04 22:21 ` [patch V3 31/37] asm-generic: Provide generic TIF infrastructure Thomas Gleixner
2025-09-04 22:21 ` [patch V3 32/37] x86: Use generic TIF bits Thomas Gleixner
2025-09-04 22:21 ` [patch V3 33/37] s390: " Thomas Gleixner
2025-09-04 22:21 ` [patch V3 34/37] loongarch: " Thomas Gleixner
2025-09-04 22:21 ` [patch V3 35/37] riscv: " Thomas Gleixner
2025-09-04 22:21 ` [patch V3 36/37] rseq: Switch to TIF_RSEQ if supported Thomas Gleixner
2025-09-04 22:21 ` [patch V3 37/37] entry/rseq: Optimize for TIF_RSEQ on exit Thomas Gleixner

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