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From: Vadim Fedorenko To: Jakub Kicinski , Andrew Lunn , Michael Chan , Pavan Chebbi , Tariq Toukan , Gal Pressman , intel-wired-lan@lists.osuosl.org, Donald Hunter , Carolina Jubran , Aleksandr Loktionov , Vadim Fedorenko Cc: Paolo Abeni , Simon Horman , netdev@vger.kernel.org, Yael Chemla , Dragos Tatulea Date: Fri, 19 Sep 2025 19:46:50 +0000 Message-ID: <20250919194651.2164987-5-vadim.fedorenko@linux.dev> In-Reply-To: <20250919194651.2164987-1-vadim.fedorenko@linux.dev> References: <20250919194651.2164987-1-vadim.fedorenko@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1758311704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3CKNQEwvTo9N0xolpoDmKgPImVgvl1TyABWINDjAqBY=; b=jzVtV42KiJ6Z9dpXDAi3pS92etqr4ogQ9zN07jhvuyuuTTNLG3q1f6ZGuNTwj78hZ8MhRN q3Lr1QbT3vOi8J6s2POIed6vJaMBcFz43Fw9DGjd/xyyKUnoRPzvGVEUodrrPF4vY5YfjB 5aD5/BVIIVq1+89JWenKM95sN1QHZ2k= X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dmarc=pass (p=none dis=none) header.from=linux.dev X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=jzVtV42K Subject: [Intel-wired-lan] [PATCH net-next v4 4/5] net/mlx5e: Report RS-FEC histogram statistics via ethtool X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Carolina Jubran Add support for reporting RS-FEC histogram counters by reading them from the RS_FEC_HISTOGRAM_GROUP in the PPCNT register. Co-developed-by: Yael Chemla Signed-off-by: Yael Chemla Signed-off-by: Carolina Jubran Reviewed-by: Dragos Tatulea Reviewed-by: Yael Chemla --- .../ethernet/mellanox/mlx5/core/en_stats.c | 34 ++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index e6613672b8f5..ffc4f9b4f284 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -1552,15 +1552,47 @@ fec_rs_histogram_fill_ranges(struct mlx5e_priv *priv, int mode, return num_of_bins; } +static void fec_rs_histogram_fill_stats(struct mlx5e_priv *priv, + u8 num_of_bins, + struct ethtool_fec_hist *hist) +{ + struct mlx5_core_dev *mdev = priv->mdev; + u32 out[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); + void *rs_histogram_cntrs; + + MLX5_SET(ppcnt_reg, in, local_port, 1); + MLX5_SET(ppcnt_reg, in, grp, MLX5_RS_FEC_HISTOGRAM_GROUP); + if (mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0)) + return; + + rs_histogram_cntrs = MLX5_ADDR_OF(ppcnt_reg, out, + counter_set.rs_histogram_cntrs); + /* Guaranteed that num_of_bins is less than MLX5E_FEC_RS_HIST_MAX + * by fec_rs_histogram_fill_ranges(). + */ + for (int i = 0; i < num_of_bins; i++) + hist->values[i].sum = MLX5_GET64(rs_histogram_cntrs, + rs_histogram_cntrs, + hist[i]); +} + static void fec_set_histograms_stats(struct mlx5e_priv *priv, int mode, struct ethtool_fec_hist *hist) { + u8 num_of_bins; + switch (mode) { case MLX5E_FEC_RS_528_514: case MLX5E_FEC_RS_544_514: case MLX5E_FEC_LLRS_272_257_1: case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD: - fec_rs_histogram_fill_ranges(priv, mode, &hist->ranges); + num_of_bins = + fec_rs_histogram_fill_ranges(priv, mode, &hist->ranges); + if (num_of_bins) + return fec_rs_histogram_fill_stats(priv, num_of_bins, + hist); break; default: return; -- 2.47.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6E5D307AE4 for ; Fri, 19 Sep 2025 19:55:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758311707; cv=none; b=MUxl9o377r141O/XfAhhEG8Nsp6Wzduj66Ne0+ifVpd/Jcsf49RpZeI3zNx5AJfjAQguxAUDKe0zwaHg53dGbaD7JbM5TspSAK+E1O+ssYIqAcwvFTK/ccCXQM6ZhDKm2hJNYo5138YXyKR+CXFHH42VkLPWL4azLvSOEZ76E4w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758311707; c=relaxed/simple; bh=qGI/wJzTU84dgNFPey7EYsefWqCVvZl7xxNQRJlXEcY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Pao8hcfVEZ+deFQWLgY5QcgUkiJPt2TycH6M2rceNKbClpNZoyn4prqtgnyDcUL5f2Xu95NMrEKg8QR+9k/A1KxYVwnmpqtQ/ikJz7MnLeoRUsvBhJEEc3acZRvOvmX8YC6PNXhfoepWEJbDb4VW5sDe+3tRU8MeGbdhVBRg6Tw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=jzVtV42K; arc=none smtp.client-ip=95.215.58.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="jzVtV42K" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1758311704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3CKNQEwvTo9N0xolpoDmKgPImVgvl1TyABWINDjAqBY=; b=jzVtV42KiJ6Z9dpXDAi3pS92etqr4ogQ9zN07jhvuyuuTTNLG3q1f6ZGuNTwj78hZ8MhRN q3Lr1QbT3vOi8J6s2POIed6vJaMBcFz43Fw9DGjd/xyyKUnoRPzvGVEUodrrPF4vY5YfjB 5aD5/BVIIVq1+89JWenKM95sN1QHZ2k= From: Vadim Fedorenko To: Jakub Kicinski , Andrew Lunn , Michael Chan , Pavan Chebbi , Tariq Toukan , Gal Pressman , intel-wired-lan@lists.osuosl.org, Donald Hunter , Carolina Jubran , Aleksandr Loktionov , Vadim Fedorenko Cc: Paolo Abeni , Simon Horman , netdev@vger.kernel.org, Yael Chemla , Dragos Tatulea Subject: [PATCH net-next v4 4/5] net/mlx5e: Report RS-FEC histogram statistics via ethtool Date: Fri, 19 Sep 2025 19:46:50 +0000 Message-ID: <20250919194651.2164987-5-vadim.fedorenko@linux.dev> In-Reply-To: <20250919194651.2164987-1-vadim.fedorenko@linux.dev> References: <20250919194651.2164987-1-vadim.fedorenko@linux.dev> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT From: Carolina Jubran Add support for reporting RS-FEC histogram counters by reading them from the RS_FEC_HISTOGRAM_GROUP in the PPCNT register. Co-developed-by: Yael Chemla Signed-off-by: Yael Chemla Signed-off-by: Carolina Jubran Reviewed-by: Dragos Tatulea Reviewed-by: Yael Chemla --- .../ethernet/mellanox/mlx5/core/en_stats.c | 34 ++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index e6613672b8f5..ffc4f9b4f284 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -1552,15 +1552,47 @@ fec_rs_histogram_fill_ranges(struct mlx5e_priv *priv, int mode, return num_of_bins; } +static void fec_rs_histogram_fill_stats(struct mlx5e_priv *priv, + u8 num_of_bins, + struct ethtool_fec_hist *hist) +{ + struct mlx5_core_dev *mdev = priv->mdev; + u32 out[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); + void *rs_histogram_cntrs; + + MLX5_SET(ppcnt_reg, in, local_port, 1); + MLX5_SET(ppcnt_reg, in, grp, MLX5_RS_FEC_HISTOGRAM_GROUP); + if (mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0)) + return; + + rs_histogram_cntrs = MLX5_ADDR_OF(ppcnt_reg, out, + counter_set.rs_histogram_cntrs); + /* Guaranteed that num_of_bins is less than MLX5E_FEC_RS_HIST_MAX + * by fec_rs_histogram_fill_ranges(). + */ + for (int i = 0; i < num_of_bins; i++) + hist->values[i].sum = MLX5_GET64(rs_histogram_cntrs, + rs_histogram_cntrs, + hist[i]); +} + static void fec_set_histograms_stats(struct mlx5e_priv *priv, int mode, struct ethtool_fec_hist *hist) { + u8 num_of_bins; + switch (mode) { case MLX5E_FEC_RS_528_514: case MLX5E_FEC_RS_544_514: case MLX5E_FEC_LLRS_272_257_1: case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD: - fec_rs_histogram_fill_ranges(priv, mode, &hist->ranges); + num_of_bins = + fec_rs_histogram_fill_ranges(priv, mode, &hist->ranges); + if (num_of_bins) + return fec_rs_histogram_fill_stats(priv, num_of_bins, + hist); break; default: return; -- 2.47.3