From: Jakub Kicinski <kuba@kernel.org>
To: Tariq Toukan <tariqt@nvidia.com>
Cc: Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Saeed Mahameed <saeedm@nvidia.com>,
"Mark Bloch" <mbloch@nvidia.com>,
Leon Romanovsky <leon@kernel.org>,
"Jesper Dangaard Brouer" <hawk@kernel.org>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
<netdev@vger.kernel.org>, <linux-rdma@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, Gal Pressman <gal@nvidia.com>,
Dragos Tatulea <dtatulea@nvidia.com>
Subject: Re: [PATCH net-next 2/2] net/mlx5e: Clamp page_pool size to max
Date: Tue, 23 Sep 2025 07:23:56 -0700 [thread overview]
Message-ID: <20250923072356.7e6c234f@kernel.org> (raw)
In-Reply-To: <1758532715-820422-3-git-send-email-tariqt@nvidia.com>
On Mon, 22 Sep 2025 12:18:35 +0300 Tariq Toukan wrote:
> When the user configures a large ring size (8K) and a large MTU (9000)
> in HW-GRO mode, the queue will fail to allocate due to the size of the
> page_pool going above the limit.
Please do some testing. A PP cache of 32k is just silly, you should
probably use a smaller limit.
next prev parent reply other threads:[~2025-09-23 14:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 9:18 [PATCH net-next 0/2] net: page_pool: Expose size limit Tariq Toukan
2025-09-22 9:18 ` [PATCH net-next 1/2] net: page_pool: Expose internal limit Tariq Toukan
2025-10-24 9:11 ` Ilias Apalodimas
2025-09-22 9:18 ` [PATCH net-next 2/2] net/mlx5e: Clamp page_pool size to max Tariq Toukan
2025-09-23 13:10 ` Simon Horman
2025-09-23 14:23 ` Jakub Kicinski [this message]
2025-09-23 15:12 ` Dragos Tatulea
2025-09-23 15:23 ` Jakub Kicinski
2025-09-24 0:23 ` Jakub Kicinski
2025-09-25 10:25 ` Dragos Tatulea
2025-09-25 15:03 ` Jakub Kicinski
2025-09-22 10:04 ` [PATCH net-next 0/2] net: page_pool: Expose size limit Dawid Osuchowski
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